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author | Jakub Jelinek <jakub@redhat.com> | 2011-11-04 11:39:25 +0100 |
---|---|---|
committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2011-11-04 11:39:25 +0100 |
commit | 635c6321d455dd13aeb1d5d19615fd10407dd71d (patch) | |
tree | 2d020db81461685cb3a0182ea9b3a6aa4e012d22 | |
parent | 2f2da9e931c163c6f4ce6433972854e5d0e62216 (diff) | |
download | gcc-635c6321d455dd13aeb1d5d19615fd10407dd71d.zip gcc-635c6321d455dd13aeb1d5d19615fd10407dd71d.tar.gz gcc-635c6321d455dd13aeb1d5d19615fd10407dd71d.tar.bz2 |
i386.c (ix86_expand_vector_convert_uns_vsivsf): New function.
* config/i386/i386.c (ix86_expand_vector_convert_uns_vsivsf): New
function.
* config/i386/i386-protos.h (ix86_expand_vector_convert_uns_vsivsf):
New prototype.
* config/i386/sse.md (floatuns<sseintvecmodelower><mode>2): Use it.
For floatunsv8siv8sf2 require TARGET_AVX2.
* gcc.dg/torture/vec-cvt-1.c: Enable commented out inttoflttestui
test.
From-SVN: r180934
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/i386/i386-protos.h | 1 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 37 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 28 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 3 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/torture/vec-cvt-1.c | 2 |
6 files changed, 54 insertions, 24 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 07f286c..6896ffd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2011-11-04 Jakub Jelinek <jakub@redhat.com> + * config/i386/i386.c (ix86_expand_vector_convert_uns_vsivsf): New + function. + * config/i386/i386-protos.h (ix86_expand_vector_convert_uns_vsivsf): + New prototype. + * config/i386/sse.md (floatuns<sseintvecmodelower><mode>2): Use it. + For floatunsv8siv8sf2 require TARGET_AVX2. + * config/i386/i386.c (ix86_expand_adjust_ufix_to_sfix_si): Add XORP argument. Subtract 0x1p31 instead of 0x1p32. Use normal signalling comparison instead of non-signalling. Store into diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index ec4bece..b2eb973 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -109,6 +109,7 @@ extern void ix86_expand_convert_uns_sixf_sse (rtx, rtx); extern void ix86_expand_convert_uns_sidf_sse (rtx, rtx); extern void ix86_expand_convert_uns_sisf_sse (rtx, rtx); extern void ix86_expand_convert_sign_didf_sse (rtx, rtx); +extern void ix86_expand_vector_convert_uns_vsivsf (rtx, rtx); extern rtx ix86_expand_adjust_ufix_to_sfix_si (rtx, rtx *); extern enum ix86_fpcmp_strategy ix86_fp_comparison_strategy (enum rtx_code); extern void ix86_expand_fp_absneg_operator (enum rtx_code, enum machine_mode, diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d1730ed..fb0ac8d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -17016,6 +17016,43 @@ ix86_expand_convert_uns_sisf_sse (rtx target, rtx input) emit_move_insn (target, fp_hi); } +/* floatunsv{4,8}siv{4,8}sf2 expander. Expand code to convert + a vector of unsigned ints VAL to vector of floats TARGET. */ + +void +ix86_expand_vector_convert_uns_vsivsf (rtx target, rtx val) +{ + rtx tmp[8]; + REAL_VALUE_TYPE TWO16r; + enum machine_mode intmode = GET_MODE (val); + enum machine_mode fltmode = GET_MODE (target); + rtx (*cvt) (rtx, rtx); + + if (intmode == V4SImode) + cvt = gen_floatv4siv4sf2; + else + cvt = gen_floatv8siv8sf2; + tmp[0] = ix86_build_const_vector (intmode, 1, GEN_INT (0xffff)); + tmp[0] = force_reg (intmode, tmp[0]); + tmp[1] = expand_simple_binop (intmode, AND, val, tmp[0], NULL_RTX, 1, + OPTAB_DIRECT); + tmp[2] = expand_simple_binop (intmode, LSHIFTRT, val, GEN_INT (16), + NULL_RTX, 1, OPTAB_DIRECT); + tmp[3] = gen_reg_rtx (fltmode); + emit_insn (cvt (tmp[3], tmp[1])); + tmp[4] = gen_reg_rtx (fltmode); + emit_insn (cvt (tmp[4], tmp[2])); + real_ldexp (&TWO16r, &dconst1, 16); + tmp[5] = const_double_from_real_value (TWO16r, SFmode); + tmp[5] = force_reg (fltmode, ix86_build_const_vector (fltmode, 1, tmp[5])); + tmp[6] = expand_simple_binop (fltmode, MULT, tmp[4], tmp[5], NULL_RTX, 1, + OPTAB_DIRECT); + tmp[7] = expand_simple_binop (fltmode, PLUS, tmp[3], tmp[6], target, 1, + OPTAB_DIRECT); + if (tmp[7] != target) + emit_move_insn (target, tmp[7]); +} + /* Adjust a V*SFmode/V*DFmode value VAL so that *sfix_trunc* resp. fix_trunc* pattern can be used on it instead of *ufix_trunc* resp. fixuns_trunc*. This is done by doing just signed conversion if < 0x1p31, and otherwise by diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 535f6f9..a2826ce 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2242,30 +2242,12 @@ (set_attr "mode" "<sseinsnmode>")]) (define_expand "floatuns<sseintvecmodelower><mode>2" - [(set (match_dup 5) - (float:VF1 - (match_operand:<sseintvecmode> 1 "nonimmediate_operand" ""))) - (set (match_dup 6) - (lt:VF1 (match_dup 5) (match_dup 3))) - (set (match_dup 7) - (and:VF1 (match_dup 6) (match_dup 4))) - (set (match_operand:VF1 0 "register_operand" "") - (plus:VF1 (match_dup 5) (match_dup 7)))] - "TARGET_SSE2" + [(match_operand:VF1 0 "register_operand" "") + (match_operand:<sseintvecmode> 1 "register_operand" "")] + "TARGET_SSE2 && (<MODE>mode == V4SFmode || TARGET_AVX2)" { - REAL_VALUE_TYPE TWO32r; - rtx x; - int i; - - real_ldexp (&TWO32r, &dconst1, 32); - x = const_double_from_real_value (TWO32r, SFmode); - - operands[3] = force_reg (<MODE>mode, CONST0_RTX (<MODE>mode)); - operands[4] = force_reg (<MODE>mode, - ix86_build_const_vector (<MODE>mode, 1, x)); - - for (i = 5; i < 8; i++) - operands[i] = gen_reg_rtx (<MODE>mode); + ix86_expand_vector_convert_uns_vsivsf (operands[0], operands[1]); + DONE; }) (define_insn "avx_cvtps2dq256" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8a7f4e2..f17ff70 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,8 @@ 2011-11-04 Jakub Jelinek <jakub@redhat.com> + * gcc.dg/torture/vec-cvt-1.c: Enable commented out inttoflttestui + test. + * gcc.dg/torture/vec-cvt-1.c: Enable flttointtestui test. * gcc.dg/torture/vec-cvt-1.c: New test. diff --git a/gcc/testsuite/gcc.dg/torture/vec-cvt-1.c b/gcc/testsuite/gcc.dg/torture/vec-cvt-1.c index f9a5514..601f098 100644 --- a/gcc/testsuite/gcc.dg/torture/vec-cvt-1.c +++ b/gcc/testsuite/gcc.dg/torture/vec-cvt-1.c @@ -205,7 +205,7 @@ main () inttoflttestsl (); inttoflttestuc (); inttoflttestus (); -// inttoflttestui (); + inttoflttestui (); inttoflttestul (); return 0; } |