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author | Aldy Hernandez <aldyh@redhat.com> | 2003-04-07 18:49:11 +0000 |
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committer | Aldy Hernandez <aldyh@gcc.gnu.org> | 2003-04-07 18:49:11 +0000 |
commit | 5da702b196433484c7163a827e3202c44664734a (patch) | |
tree | b17b3f050d108f7ec88321f972781deab7a5ebe5 | |
parent | cde1d5bf91c64fd33b2b9ddd35cdc948344baed4 (diff) | |
download | gcc-5da702b196433484c7163a827e3202c44664734a.zip gcc-5da702b196433484c7163a827e3202c44664734a.tar.gz gcc-5da702b196433484c7163a827e3202c44664734a.tar.bz2 |
invoke.texi (RS/6000 and PowerPC Options): Document -mfloat-gprs.
2003-04-07 Aldy Hernandez <aldyh@redhat.com>
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mfloat-gprs.
* config/rs6000/rs6000.c: Delete rs6000_fprs.
Declare rs6000_float_gprs.
Declare rs6000_float_gprs_string.
(rs6000_parse_float_gprs_option): New.
(rs6000_override_options): Genericize rs6000_parse_* calls to use
rs6000_parse_yes_no_option.
Change check for cpu=8540, to use TARGET_E500.
(rs6000_parse_isel_option): Delete.
(rs6000_parse_spe_option): Delete.
(rs6000_parse_vrsave_option): Delete.
* config/rs6000/rs6000.h: Rename rs6000_fprs to rs6000_float_gprs.
Define rs6000_float_gprs_string.
(TARGET_OPTIONS): Add rs6000_float_gprs option.
* config/rs6000/eabi.h (TARGET_FPRS): Change to use rs6000_float_gprs.
* config/rs6000/eabispe.h: Set rs6000_float_gprs.
From-SVN: r65336
-rw-r--r-- | gcc/ChangeLog | 24 | ||||
-rw-r--r-- | gcc/config/rs6000/eabi.h | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/eabispe.h | 3 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 102 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.h | 5 | ||||
-rw-r--r-- | gcc/doc/invoke.texi | 8 |
6 files changed, 86 insertions, 58 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8fa41fd..f779ed3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,27 @@ +2003-04-07 Aldy Hernandez <aldyh@redhat.com> + + * doc/invoke.texi (RS/6000 and PowerPC Options): Document + -mfloat-gprs. + + * config/rs6000/rs6000.c: Delete rs6000_fprs. + Declare rs6000_float_gprs. + Declare rs6000_float_gprs_string. + (rs6000_parse_float_gprs_option): New. + (rs6000_override_options): Genericize rs6000_parse_* calls to use + rs6000_parse_yes_no_option. + Change check for cpu=8540, to use TARGET_E500. + (rs6000_parse_isel_option): Delete. + (rs6000_parse_spe_option): Delete. + (rs6000_parse_vrsave_option): Delete. + + * config/rs6000/rs6000.h: Rename rs6000_fprs to rs6000_float_gprs. + Define rs6000_float_gprs_string. + (TARGET_OPTIONS): Add rs6000_float_gprs option. + + * config/rs6000/eabi.h (TARGET_FPRS): Change to use rs6000_float_gprs. + + * config/rs6000/eabispe.h: Set rs6000_float_gprs. + Mon Apr 7 14:36:24 CEST 2003 Jan Hubicka <jh@suse.cz> PR opt/10024 diff --git a/gcc/config/rs6000/eabi.h b/gcc/config/rs6000/eabi.h index e61a91f..cda9a6a 100644 --- a/gcc/config/rs6000/eabi.h +++ b/gcc/config/rs6000/eabi.h @@ -53,4 +53,4 @@ Boston, MA 02111-1307, USA. */ #define TARGET_SPE rs6000_spe #define TARGET_E500 (rs6000_cpu == PROCESSOR_PPC8540) #define TARGET_ISEL rs6000_isel -#define TARGET_FPRS rs6000_fprs +#define TARGET_FPRS (!rs6000_float_gprs) diff --git a/gcc/config/rs6000/eabispe.h b/gcc/config/rs6000/eabispe.h index 5cbe7f7..f907c97 100644 --- a/gcc/config/rs6000/eabispe.h +++ b/gcc/config/rs6000/eabispe.h @@ -32,7 +32,8 @@ Boston, MA 02111-1307, USA. */ rs6000_cpu = PROCESSOR_PPC8540; \ if (rs6000_abi_string == NULL || strstr (rs6000_abi_string, "spe") == NULL) \ rs6000_spe_abi = 1; \ - rs6000_fprs = 0; \ + if (rs6000_float_gprs_string == NULL) \ + rs6000_float_gprs = 1; \ /* See note below. */ \ /*if (rs6000_long_double_size_string == NULL)*/ \ /* rs6000_long_double_type_size = 128;*/ \ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 921d25d..af179b1 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -98,8 +98,11 @@ int rs6000_isel; /* Whether SPE simd instructions should be generated. */ int rs6000_spe; -/* Nonzero if we have FPRs. */ -int rs6000_fprs = 1; +/* Nonzero if floating point operations are done in the GPRs. */ +int rs6000_float_gprs = 0; + +/* String from -mfloat-gprs=. */ +const char *rs6000_float_gprs_string; /* String from -misel=. */ const char *rs6000_isel_string; @@ -274,9 +277,7 @@ static rtx altivec_expand_abs_builtin PARAMS ((enum insn_code, tree, rtx)); static rtx altivec_expand_predicate_builtin PARAMS ((enum insn_code, const char *, tree, rtx)); static rtx altivec_expand_stv_builtin PARAMS ((enum insn_code, tree)); static void rs6000_parse_abi_options PARAMS ((void)); -static void rs6000_parse_vrsave_option PARAMS ((void)); -static void rs6000_parse_isel_option PARAMS ((void)); -static void rs6000_parse_spe_option (void); +static void rs6000_parse_yes_no_option (const char *, const char *, int *); static int first_altivec_reg_to_save PARAMS ((void)); static unsigned int compute_vrsave_mask PARAMS ((void)); static void is_altivec_return_reg PARAMS ((rtx, void *)); @@ -702,14 +703,14 @@ rs6000_override_options (default_cpu) /* Handle -mabi= options. */ rs6000_parse_abi_options (); - /* Handle -mvrsave= option. */ - rs6000_parse_vrsave_option (); - - /* Handle -misel= option. */ - rs6000_parse_isel_option (); - - /* Handle -mspe= option. */ - rs6000_parse_spe_option (); + /* Handle generic -mFOO=YES/NO options. */ + rs6000_parse_yes_no_option ("vrsave", rs6000_altivec_vrsave_string, + &rs6000_altivec_vrsave); + rs6000_parse_yes_no_option ("isel", rs6000_isel_string, + &rs6000_isel); + rs6000_parse_yes_no_option ("spe", rs6000_spe_string, &rs6000_spe); + rs6000_parse_yes_no_option ("float-gprs", rs6000_float_gprs_string, + &rs6000_float_gprs); #ifdef SUBTARGET_OVERRIDE_OPTIONS SUBTARGET_OVERRIDE_OPTIONS; @@ -718,10 +719,27 @@ rs6000_override_options (default_cpu) SUBSUBTARGET_OVERRIDE_OPTIONS; #endif - /* The e500 does not have string instructions, and we set - MASK_STRING above when optimizing for size. */ - if (rs6000_cpu == PROCESSOR_PPC8540 && (target_flags & MASK_STRING) != 0) - target_flags = target_flags & ~MASK_STRING; + if (TARGET_E500) + { + /* The e500 does not have string instructions, and we set + MASK_STRING above when optimizing for size. */ + if ((target_flags & MASK_STRING) != 0) + target_flags = target_flags & ~MASK_STRING; + } + else if (rs6000_select[1].string != NULL) + { + /* For the powerpc-eabispe configuration, we set all these by + default, so let's unset them if we manually set another + CPU that is not the E500. */ + if (rs6000_abi_string == 0) + rs6000_spe_abi = 0; + if (rs6000_spe_string == 0) + rs6000_spe = 0; + if (rs6000_float_gprs_string == 0) + rs6000_float_gprs = 0; + if (rs6000_isel_string == 0) + rs6000_isel = 0; + } /* Handle -m(no-)longcall option. This is a bit of a cheap hack, using TARGET_OPTIONS to handle a toggle switch, but we're out of @@ -783,48 +801,22 @@ rs6000_override_options (default_cpu) init_machine_status = rs6000_init_machine_status; } -/* Handle -misel= option. */ +/* Handle generic options of the form -mfoo=yes/no. + NAME is the option name. + VALUE is the option value. + FLAG is the pointer to the flag where to store a 1 or 0, depending on + whether the option value is 'yes' or 'no' respectively. */ static void -rs6000_parse_isel_option () +rs6000_parse_yes_no_option (const char *name, const char *value, int *flag) { - if (rs6000_isel_string == 0) + if (value == 0) return; - else if (! strcmp (rs6000_isel_string, "yes")) - rs6000_isel = 1; - else if (! strcmp (rs6000_isel_string, "no")) - rs6000_isel = 0; - else - error ("unknown -misel= option specified: '%s'", - rs6000_isel_string); -} - -/* Handle -mspe= option. */ -static void -rs6000_parse_spe_option (void) -{ - if (rs6000_spe_string == 0) - return; - else if (!strcmp (rs6000_spe_string, "yes")) - rs6000_spe = 1; - else if (!strcmp (rs6000_spe_string, "no")) - rs6000_spe = 0; - else - error ("unknown -mspe= option specified: '%s'", rs6000_spe_string); -} - -/* Handle -mvrsave= options. */ -static void -rs6000_parse_vrsave_option () -{ - /* Generate VRSAVE instructions by default. */ - if (rs6000_altivec_vrsave_string == 0 - || ! strcmp (rs6000_altivec_vrsave_string, "yes")) - rs6000_altivec_vrsave = 1; - else if (! strcmp (rs6000_altivec_vrsave_string, "no")) - rs6000_altivec_vrsave = 0; + else if (!strcmp (value, "yes")) + *flag = 1; + else if (!strcmp (value, "no")) + *flag = 0; else - error ("unknown -mvrsave= option specified: '%s'", - rs6000_altivec_vrsave_string); + error ("unknown -m%s= option specified: '%s'", name, value); } /* Handle -mabi= options. */ diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 10d6233..b326292 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -390,6 +390,8 @@ extern enum processor_type rs6000_cpu; N_("Specify yes/no if isel instructions should be generated") }, \ {"spe=", &rs6000_spe_string, \ N_("Specify yes/no if SPE SIMD instructions should be generated") },\ + {"float-gprs=", &rs6000_float_gprs_string, \ + N_("Specify yes/no if using floating point in the GPRs") }, \ {"vrsave=", &rs6000_altivec_vrsave_string, \ N_("Specify yes/no if VRSAVE instructions should be generated for AltiVec") }, \ {"longcall", &rs6000_longcall_switch, \ @@ -428,7 +430,8 @@ extern int rs6000_altivec_abi; extern int rs6000_spe_abi; extern int rs6000_isel; extern int rs6000_spe; -extern int rs6000_fprs; +extern int rs6000_float_gprs; +extern const char *rs6000_float_gprs_string; extern const char *rs6000_isel_string; extern const char *rs6000_spe_string; extern const char *rs6000_altivec_vrsave_string; diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a144266..2655cd5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -427,6 +427,7 @@ in the following sections. -mabi=spe -mabi=no-spe @gol -misel=yes -misel=no @gol -mspe=yes -mspe=no @gol +-mfloat-gprs=yes -mfloat-gprs=no @gol -mprototype -mno-prototype @gol -msim -mmvme -mads -myellowknife -memb -msdata @gol -msdata=@var{opt} -mvxworks -mwindiss -G @var{num} -pthread} @@ -6995,6 +6996,13 @@ This switch enables or disables the generation of ISEL instructions. This switch enables or disables the generation of SPE simd instructions. +@item -mfloat-gprs=@var{yes/no} +@itemx -mfloat-gprs +@opindex mfloat-gprs +This switch enables or disables the generation of floating point +operations on the general purpose registers for architectures that +support it. This option is currently only available on the MPC8540. + @item -mfull-toc @itemx -mno-fp-in-toc @itemx -mno-sum-in-toc |