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| author | Richard Henderson <rth@redhat.com> | 2012-12-20 10:05:19 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2012-12-20 10:05:19 -0800 |
| commit | 571e408a9f31b9ddc1c71019ce63d12e355bc219 (patch) | |
| tree | 9185eb4c3a256079a66c576e7d71ae9b04890234 | |
| parent | 1a2e356efefb29718ef217149c0df76fcb4ac08a (diff) | |
| download | gcc-571e408a9f31b9ddc1c71019ce63d12e355bc219.zip gcc-571e408a9f31b9ddc1c71019ce63d12e355bc219.tar.gz gcc-571e408a9f31b9ddc1c71019ce63d12e355bc219.tar.bz2 | |
s390: Generate rxsbg, and shifted forms of rosbg
* config/s390/s390.md (IXOR): New code iterator.
(*r<IXOR>sbg_<GPR>_noshift): Rename from *insv<GPR>_or_z10_noshift;
macro-ize to handle XOR too.
(*r<IXOR>sbg_di_rotl, *r<IXOR>sbg_<GPR>_srl, *r<IXOR>sbg_<GPR>_sll):
New patterns.
Co-Authored-By: Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
From-SVN: r194645
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/s390/s390.md | 61 |
2 files changed, 62 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d2b9342..b01203f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -28,7 +28,13 @@ (*extzv<GPR>_zEC12, *extzv<GPR>_z10): New insns. (*pre_z10_extzv<GPR>): Rename from *extzv<GPR>; simplify with nonzero_shift_count_operand. - (*extzv_<mode>_srl, *extzv_<mode>_sll): New insns. + (*extzv_<GPR>_srl, *extzv_<GPR>_sll): New insns. + + * config/s390/s390.md (IXOR): New code iterator. + (*r<IXOR>sbg_<GPR>_noshift): Rename from *insv<GPR>_or_z10_noshift; + macro-ize to handle XOR too. + (*r<IXOR>sbg_di_rotl, *r<IXOR>sbg_<GPR>_srl, *r<IXOR>sbg_<GPR>_sll): + New patterns. 2012-12-20 Thomas Schwinge <thomas@codesourcery.com> diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index f32004c..3a1b4c0 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -393,6 +393,9 @@ ;; the same template. (define_code_iterator SHIFT [ashift lshiftrt]) +;; This iterator allow r[ox]sbg to be defined with the same template +(define_code_iterator IXOR [ior xor]) + ;; This iterator and attribute allow to combine most atomic operations. (define_code_iterator ATOMIC [and ior xor plus minus mult]) (define_code_iterator ATOMIC_Z196 [and ior xor plus]) @@ -3474,15 +3477,61 @@ [(set_attr "op_type" "RIE") (set_attr "z10prop" "z10_super_E1")]) -; and op1 with a mask being 1 for the selected bits and 0 for the rest -(define_insn "*insv<mode>_or_z10_noshift" +(define_insn "*r<noxa>sbg_<mode>_noshift" [(set (match_operand:GPR 0 "nonimmediate_operand" "=d") - (ior:GPR (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "d") - (match_operand:GPR 2 "contiguous_bitmask_operand" "")) - (match_operand:GPR 3 "nonimmediate_operand" "0"))) + (IXOR:GPR + (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "d") + (match_operand:GPR 2 "contiguous_bitmask_operand" "")) + (match_operand:GPR 3 "nonimmediate_operand" "0"))) (clobber (reg:CC CC_REGNUM))] "TARGET_Z10" - "rosbg\t%0,%1,%<bfstart>2,%<bfend>2,0" + "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,0" + [(set_attr "op_type" "RIE")]) + +(define_insn "*r<noxa>sbg_di_rotl" + [(set (match_operand:DI 0 "nonimmediate_operand" "=d") + (IXOR:DI + (and:DI + (rotate:DI + (match_operand:DI 1 "nonimmediate_operand" "d") + (match_operand:DI 3 "const_int_operand" "")) + (match_operand:DI 2 "contiguous_bitmask_operand" "")) + (match_operand:DI 4 "nonimmediate_operand" "0"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_Z10" + "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,%b3" + [(set_attr "op_type" "RIE")]) + +(define_insn "*r<noxa>sbg_<mode>_srl" + [(set (match_operand:GPR 0 "nonimmediate_operand" "=d") + (IXOR:GPR + (and:GPR + (lshiftrt:GPR + (match_operand:GPR 1 "nonimmediate_operand" "d") + (match_operand:GPR 3 "nonzero_shift_count_operand" "")) + (match_operand:GPR 2 "contiguous_bitmask_operand" "")) + (match_operand:GPR 4 "nonimmediate_operand" "0"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_Z10 + && s390_extzv_shift_ok (<bitsize>, 64 - INTVAL (operands[3]), + INTVAL (operands[2]))" + "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,64-%3" + [(set_attr "op_type" "RIE")]) + +(define_insn "*r<noxa>sbg_<mode>_sll" + [(set (match_operand:GPR 0 "nonimmediate_operand" "=d") + (IXOR:GPR + (and:GPR + (ashift:GPR + (match_operand:GPR 1 "nonimmediate_operand" "d") + (match_operand:GPR 3 "nonzero_shift_count_operand" "")) + (match_operand:GPR 2 "contiguous_bitmask_operand" "")) + (match_operand:GPR 4 "nonimmediate_operand" "0"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_Z10 + && s390_extzv_shift_ok (<bitsize>, INTVAL (operands[3]), + INTVAL (operands[2]))" + "r<noxa>sbg\t%0,%1,%<bfstart>2,%<bfend>2,%3" [(set_attr "op_type" "RIE")]) (define_insn "*insv<mode>_mem_reg" |