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| author | Richard Earnshaw <rearnsha@arm.com> | 2009-06-01 00:23:52 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2009-06-01 00:23:52 +0000 |
| commit | 54b2b4605f5ade63cc5641aaecaca3c4e4e2f248 (patch) | |
| tree | 6d91afe381703f72e07dc2953a918a52d80a00f8 | |
| parent | 3240b4d6fc7faef114ba949f335d482bd7885c6c (diff) | |
| download | gcc-54b2b4605f5ade63cc5641aaecaca3c4e4e2f248.zip gcc-54b2b4605f5ade63cc5641aaecaca3c4e4e2f248.tar.gz gcc-54b2b4605f5ade63cc5641aaecaca3c4e4e2f248.tar.bz2 | |
thumb2.md (thumb2_zero_extendhidi2): New insn and split.
* arm/thumb2.md (thumb2_zero_extendhidi2): New insn and split.
(thumb2_extendhidi2): Likewise.
From-SVN: r148026
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/thumb2.md | 49 |
2 files changed, 54 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 757f9d0..e94d982 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2009-06-01 Richard Earnshaw <rearnsha@arm.com> + + * arm/thumb2.md (thumb2_zero_extendhidi2): New insn and split. + (thumb2_extendhidi2): Likewise. + 2009-05-31 Ian Lance Taylor <iant@google.com> * regstat.c (regstat_n_sets_and_refs): Remove duplicate diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 203001b..6ed6fb3 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -870,6 +870,31 @@ (set_attr "predicable" "yes")] ) +(define_insn_and_split "*thumb2_zero_extendhidi2" + [(set (match_operand:DI 0 "s_register_operand" "=r,r") + (zero_extend:DI (match_operand:HI 1 "nonimmediate_operand" "r,m")))] + "TARGET_THUMB2" + "@ + uxth%?\\t%Q0, %1\;mov%?\\t%R0, #0 + ldr%(h%)\\t%Q0, %1\;mov%?\\t%R0, #0" + "&& reload_completed" + [(set (match_dup 0) (zero_extend:SI (match_dup 1))) + (set (match_dup 2) (match_dup 3))] + " + { + operands[2] = gen_highpart (SImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + operands[3] = const0_rtx; + } + " + [(set_attr "length" "8") + (set_attr "ce_count" "2") + (set_attr "predicable" "yes") + (set_attr "type" "*,load_byte") + (set_attr "pool_range" "*,4092") + (set_attr "neg_pool_range" "*,250")] +) + (define_insn_and_split "*thumb2_zero_extendqidi2" [(set (match_operand:DI 0 "s_register_operand" "=r,r") (zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] @@ -915,6 +940,30 @@ (set_attr "predicable" "yes")] ) +(define_insn_and_split "*thumb2_extendhidi2" + [(set (match_operand:DI 0 "s_register_operand" "=r,r") + (sign_extend:DI (match_operand:HI 1 "nonimmediate_operand" "r,m")))] + "TARGET_THUMB2" + "@ + sxth%?\\t%Q0, %1\;asr%?\\t%R0, %Q0, #31 + ldrsh%?\\t%Q0, %1\;asr%?\\t%R0, %Q0, #31" + "&& reload_completed" + [(set (match_dup 0) (sign_extend:SI (match_dup 1))) + (set (match_dup 2) (ashiftrt:SI (match_dup 0) (const_int 31)))] + " + { + operands[2] = gen_highpart (SImode, operands[0]); + operands[0] = gen_lowpart (SImode, operands[0]); + } + " + [(set_attr "length" "8") + (set_attr "ce_count" "2") + (set_attr "predicable" "yes") + (set_attr "type" "*,load_byte") + (set_attr "pool_range" "*,4092") + (set_attr "neg_pool_range" "*,250")] +) + (define_insn_and_split "*thumb2_extendqidi2" [(set (match_operand:DI 0 "s_register_operand" "=r,r") (sign_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] |