testsuite, rs6000: Replace powerpc_vsx_ok with powerpc_altivec etc.

This is a follow up patch for the previous patch adjusting
powerpc_vsx_ok with powerpc_vsx, focusing on those test cases
which don't really require VSX feature but used powerpc_vsx_ok
before, they actually require some other effective target check,
like some of them just require ALTIVEC feature, some of them
just require hard float support, and some of them just require
ISA 2.06 etc..

By the way, ppc-fpconv-4.c is the only one missing powerpc_fprs
among ppc-fpconv-*.c after this replacement, so I also fix it
here.

	PR testsuite/114842

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/bswap64-2.c: Replace powerpc_vsx_ok check with
	has_arch_pwr7.
	* gcc.target/powerpc/ppc-fpconv-2.c: Replace powerpc_vsx_ok check with
	powerpc_fprs.
	* gcc.target/powerpc/ppc-fpconv-6.c: Likewise.
	* gcc.target/powerpc/ppc-pow.c: Likewise.
	* gcc.target/powerpc/ppc-target-1.c: Likewise.
	* gcc.target/powerpc/ppc-target-2.c: Likewise.
	* gcc.target/powerpc/ppc-target-3.c: Likewise.
	* gcc.target/powerpc/ppc-target-4.c: Likewise.
	* gcc.target/powerpc/ppc-fpconv-4.c: Check for powerpc_fprs.
	* gcc.target/powerpc/fold-vec-select-char.c: Replace powerpc_vsx_ok
	with powerpc_altivec check and move it after dg-options line.
	* gcc.target/powerpc/fold-vec-select-float.c: Likewise.
	* gcc.target/powerpc/fold-vec-select-int.c: Likewise.
	* gcc.target/powerpc/fold-vec-select-short.c: Likewise.
	* gcc.target/powerpc/p9-novsx.c: Likewise.
	* gcc.target/powerpc/p9-options-1.c: Likewise.

15 files changed, 19 insertions, 16 deletions

diff --git a/gcc/testsuite/gcc.target/powerpc/bswap64-2.c b/gcc/testsuite/gcc.target/powerpc/bswap64-2.c
index 6c3d8ca..70d872b 100644
--- a/gcc/testsuite/gcc.target/powerpc/bswap64-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bswap64-2.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-options "-O2 -mpopcntd" } */
 /* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target has_arch_pwr7 } */
 /* { dg-final { scan-assembler "ldbrx" } } */
 /* { dg-final { scan-assembler "stdbrx" } } */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c
index e055c01..17e2891 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-char.c
@@ -2,8 +2,8 @@
    inputs produce the right code.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c
index 1656fbf..848bd75 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-float.c
@@ -1,9 +1,9 @@
-/* Verify that overloaded built-ins for vec_sel with float 
-   inputs for VSX produce the right code.  */
+/* Verify that overloaded built-ins for vec_sel with float
+   inputs produce the right code.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c
index 510fc56..f51d741 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-int.c
@@ -2,8 +2,8 @@
    inputs produce the right code.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c
index 0d11fce..666e07a 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-select-short.c
@@ -2,8 +2,8 @@
    inputs produce the right code.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-maltivec -O2" } */
+/* { dg-require-effective-target powerpc_altivec } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-novsx.c b/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
index 7192676..15807f9 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-novsx.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-vsx -O1" } */
+/* { dg-require-effective-target powerpc_altivec } */
 /* { dg-final { scan-assembler-times "lvx %?v?2,%?r?3" 1 } } */
 /* { dg-final { scan-assembler-times "stvx %?v?2,%?r?3" 1 } } */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-options-1.c b/gcc/testsuite/gcc.target/powerpc/p9-options-1.c
index 9da4d36..034a7f8 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-options-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-options-1.c
@@ -1,6 +1,6 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-options "-mdejagnu-cpu=power9 -mno-vsx" } */
+/* { dg-require-effective-target powerpc_altivec } */
 
 #include <altivec.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c
index df5c5df..6f8e3c8 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c
@@ -1,6 +1,6 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -mdejagnu-cpu=power6 -ffast-math" } */
 /* { dg-final { scan-assembler-times "lfiwax" 2 } } */
 /* { dg-final { scan-assembler-not "lfiwzx" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c
index b9db876..9db22cb 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c
@@ -1,6 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target ilp32 } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-skip-if "" { powerpc*-*-* } { "-mpowerpc64" } } */
 /* { dg-options "-O2 -mdejagnu-cpu=750 -ffast-math" } */
 /* { dg-final { scan-assembler-not "lfiwax" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c
index 794a6f9..24a6dd9 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c
@@ -1,6 +1,6 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O3 -mdejagnu-cpu=power6 -ffast-math" } */
 /* { dg-final { scan-assembler-times "fctiwz " 2 } } */
 /* { dg-final { scan-assembler-not "fctiwuz " } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
index 6635829..dfcd57a 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c
@@ -3,7 +3,7 @@
 /* Check for VSX here, even though we don't use VSX to eliminate SPE, PAIRED
    and other ppc floating point varients.  However, we need to also eliminate
    Darwin, since it doesn't like -mcpu=power6.  */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power6 -mno-vsx -mno-altivec" } */
 /* { dg-final { scan-assembler-times "fsqrt" 3 } } */
 /* { dg-final { scan-assembler-times "fmul" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c
index 6f06e92..a9eb95a 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c
@@ -1,6 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_altivec } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mabi=altivec" } */
 /* { dg-final { scan-assembler-times "fabs" 3 } } */
 /* { dg-final { scan-assembler-times "fnabs" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c
index 034aaad..a13308f 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c
@@ -1,6 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_altivec } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mabi=altivec" } */
 /* { dg-final { scan-assembler-times "fabs" 3 } } */
 /* { dg-final { scan-assembler-times "fnabs" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c
index 4f579df..2a297fd 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c
@@ -1,6 +1,6 @@
 /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mabi=no-altivec" } */
 /* { dg-final { scan-assembler-times "fabs" 3 } } */
 /* { dg-final { scan-assembler-times "fnabs" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
index db9ba50..feef76d 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
@@ -1,6 +1,6 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target powerpc_fprs } */
 /* { dg-options "-O2 -ffast-math -mdejagnu-cpu=power5 -mno-altivec -mabi=altivec -fno-unroll-loops" } */
 /* { dg-final { scan-assembler-times "vaddfp" 1 } } */
 /* { dg-final { scan-assembler-times "xvaddsp" 1 } } */