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authorAndrea Corallo <andrea.corallo@arm.com>2020-12-09 17:59:12 +0100
committerAndrea Corallo <andrea.corallo@arm.com>2020-12-11 10:36:43 +0100
commit499651e43854ea65303eb55324263c25256c9735 (patch)
tree050bf9435bbea5b4c35d15262ccc11c56a23f87d
parentfa4a8b6463e0dbc2a072fca835d28ae7a57849d5 (diff)
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ira.c: Fix ICE in ira-color [PR97092]
gcc/ChangeLog 2020-12-10 Andrea Corallo <andrea.corallo@arm.com> PR rtl-optimization/97092 * ira-color.c (update_costs_from_allocno): Do not carry over mode between subsequent iterations. gcc/testsuite/ChangeLog 2020-12-10 Andrea Corallo <andrea.corallo@arm.com> * gcc.target/aarch64/sve/pr97092.c: New test.
-rw-r--r--gcc/ira-color.c6
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/pr97092.c24
2 files changed, 28 insertions, 2 deletions
diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index d3f8e23..eb52539 100644
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -1407,9 +1407,11 @@ update_costs_from_allocno (ira_allocno_t allocno, int hard_regno,
register classes bigger modes might be invalid,
e.g. DImode for AREG on x86. For such cases the
register move cost will be maximal. */
- mode = narrower_subreg_mode (mode, ALLOCNO_MODE (cp->second));
+ mode = narrower_subreg_mode (ALLOCNO_MODE (cp->first),
+ ALLOCNO_MODE (cp->second));
+
ira_init_register_move_cost_if_necessary (mode);
-
+
cost = (cp->second == allocno
? ira_register_move_cost[mode][rclass][aclass]
: ira_register_move_cost[mode][aclass][rclass]);
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr97092.c b/gcc/testsuite/gcc.target/aarch64/sve/pr97092.c
new file mode 100644
index 0000000..69f7a3e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr97092.c
@@ -0,0 +1,24 @@
+/* { dg-do assemble { target aarch64_asm_sve_ok } } */
+/* { dg-options "-O1 -ftree-vectorize -march=armv8.2-a+sve" } */
+
+void g (void);
+long a;
+
+signed char
+bar (int c, int d)
+{
+ return c + d;
+}
+
+void
+foo (void)
+{
+ int f;
+ for (; (long)foo < 4;) {
+ f = 0;
+ for (; f < 10; f++);
+ g ();
+ a = -4;
+ for (; a; a = bar (a, 1));
+ }
+}