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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2020-12-03 09:24:59 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2020-12-03 09:27:28 +0000 |
| commit | 48ff86adfd96a0f5132273719932b48a14941881 (patch) | |
| tree | 58ed974c389110f2f3224d85db893aabbd845c67 | |
| parent | 381d1d0120e4dfab3a714f44354e868a80dbaa25 (diff) | |
| download | gcc-48ff86adfd96a0f5132273719932b48a14941881.zip gcc-48ff86adfd96a0f5132273719932b48a14941881.tar.gz gcc-48ff86adfd96a0f5132273719932b48a14941881.tar.bz2 | |
aarch64: Add +flagm to -march
New +flagm (Condition flag manipulation) feature option for -march command line
option.
Please note that FLAGM stays a Armv8.4-A feature but now can be
assigned to other architectures or CPUs.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def
(AARCH64_OPT_EXTENSION): New +flagm option in -march for AArch64.
* config/aarch64/aarch64.h (AARCH64_FL_FLAGM): Add new flagm extension bit
mask.
(AARCH64_FL_FOR_ARCH8_4): Add flagm to Armv8.4-A.
* doc/invoke.texi: Update docs with +flagm.
| -rw-r--r-- | gcc/config/aarch64/aarch64-option-extensions.def | 3 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.h | 5 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 3 |
3 files changed, 10 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index ca08642..ec45301 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -226,4 +226,7 @@ AARCH64_OPT_EXTENSION("f64mm", AARCH64_FL_F64MM, \ AARCH64_OPT_EXTENSION("bf16", AARCH64_FL_BF16, \ AARCH64_FL_SIMD | AARCH64_FL_FP, 0, false, "bf16") +/* Enabling/Disabling "flagm" only changes "flagm". */ +AARCH64_OPT_EXTENSION("flagm", AARCH64_FL_FLAGM, 0, 0, false, "flagm") + #undef AARCH64_OPT_EXTENSION diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index d241c5b..0bdcc74 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -224,6 +224,9 @@ extern unsigned aarch64_architecture_version; /* 64-bit Floating-point Matrix Multiply (F64MM) extensions. */ #define AARCH64_FL_F64MM (1ULL << 38) +/* Flag Manipulation Instructions (FLAGM) extension. */ +#define AARCH64_FL_FLAGM (1ULL << 39) + /* Has FP and SIMD. */ #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) @@ -241,7 +244,7 @@ extern unsigned aarch64_architecture_version; (AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_V8_3) #define AARCH64_FL_FOR_ARCH8_4 \ (AARCH64_FL_FOR_ARCH8_3 | AARCH64_FL_V8_4 | AARCH64_FL_F16FML \ - | AARCH64_FL_DOTPROD | AARCH64_FL_RCPC8_4) + | AARCH64_FL_DOTPROD | AARCH64_FL_RCPC8_4 | AARCH64_FL_FLAGM) #define AARCH64_FL_FOR_ARCH8_5 \ (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_5 \ | AARCH64_FL_SB | AARCH64_FL_SSBS | AARCH64_FL_PREDRES) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 0844408..35cd3dc 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -18164,6 +18164,9 @@ Enable brain half-precision floating-point instructions. This also enables Advanced SIMD and floating-point instructions. This option is enabled by default for @option{-march=armv8.6-a}. Use of this option with architectures prior to Armv8.2-A is not supported. +@item flagm +Enable the Flag Manipulation instructions Extension. This option is enabled by +default for @option{-march=armv8.4-a}. @end table |