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| author | Tamar Christina <tamar.christina@arm.com> | 2024-10-18 09:44:15 +0100 |
|---|---|---|
| committer | Tamar Christina <tamar.christina@arm.com> | 2024-10-18 09:44:15 +0100 |
| commit | 453d3d90c374d3bb329f1431b7dfb8d0510a88b9 (patch) | |
| tree | 7b379a103a7dfeedc84162a45245d23db2683563 | |
| parent | 87dc6b1992e7ee02e7a4a81c568754198c0f61f5 (diff) | |
| download | gcc-453d3d90c374d3bb329f1431b7dfb8d0510a88b9.zip gcc-453d3d90c374d3bb329f1431b7dfb8d0510a88b9.tar.gz gcc-453d3d90c374d3bb329f1431b7dfb8d0510a88b9.tar.bz2 | |
AArch64: use movi d0, #0 to clear SVE registers instead of mov z0.d, #0
This patch changes SVE to use Adv. SIMD movi 0 to clear SVE registers when not
in SVE streaming mode. As the Neoverse Software Optimization guides indicate
SVE mov #0 is not a zero cost move.
When In streaming mode we continue to use SVE's mov to clear the registers.
Tests have already been updated.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_output_sve_mov_immediate): Use
fmov for SVE zeros.
| -rw-r--r-- | gcc/config/aarch64/aarch64.cc | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index e65b24e..3ab550a 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -25516,8 +25516,11 @@ aarch64_output_sve_mov_immediate (rtx const_vector) } } - snprintf (templ, sizeof (templ), "mov\t%%0.%c, #" HOST_WIDE_INT_PRINT_DEC, - element_char, INTVAL (info.u.mov.value)); + if (info.u.mov.value == const0_rtx && TARGET_NON_STREAMING) + snprintf (templ, sizeof (templ), "movi\t%%d0, #0"); + else + snprintf (templ, sizeof (templ), "mov\t%%0.%c, #" HOST_WIDE_INT_PRINT_DEC, + element_char, INTVAL (info.u.mov.value)); return templ; } |