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authorNick Clifton <nickc@redhat.com>2009-03-11 16:57:01 +0000
committerNick Clifton <nickc@gcc.gnu.org>2009-03-11 16:57:01 +0000
commit40190a76961a6e917ce5774372e8b65a8ca86404 (patch)
treeb28159ca7eaee1039da3a0e89a4d6ae7a90de559
parent18a3bdcbe22a8f6f05a8b4a9a9550687aa4526ce (diff)
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re PR target/5362 (Undocumented target options)
PR target/5362 * config/mcore/mcore.opt: Remove deprecated m4align and m8align options. Add description to mno-lsim option. * config/mcore/mcore.h: Remove comment about deprecated m4align option. (TARGET_DEFAULT): Remove deprecated MASK_M8ALIGN. * doc/invoke.texi: Add description of mno-lsim and mstack-increment options. From-SVN: r144783
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/mcore/mcore.h3
-rw-r--r--gcc/config/mcore/mcore.opt13
-rw-r--r--gcc/doc/invoke.texi14
4 files changed, 26 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index de7cae4..838bd34 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,15 @@
2009-03-11 Nick Clifton <nickc@redhat.com>
PR target/5362
+ * config/mcore/mcore.opt: Remove deprecated m4align and m8align
+ options.
+ Add description to mno-lsim option.
+ * config/mcore/mcore.h: Remove comment about deprecated m4align
+ option.
+ (TARGET_DEFAULT): Remove deprecated MASK_M8ALIGN.
+ * doc/invoke.texi: Add description of mno-lsim and
+ mstack-increment options.
+
* config/fr30/fr30.opt: Document the -mno-lsim option.
* doc/invoke.texi: Add descriptions of the FR30's -msmall-model
and -mno-lsim options.
diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h
index 6e26d5e..278c1b2 100644
--- a/gcc/config/mcore/mcore.h
+++ b/gcc/config/mcore/mcore.h
@@ -50,8 +50,6 @@
} \
while (0)
-/* If -m4align is ever re-enabled then add this line to the definition of CPP_SPEC
- %{!m4align:-D__MCORE_ALIGN_8__} %{m4align:-D__MCORE__ALIGN_4__}. */
#undef CPP_SPEC
#define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}"
@@ -67,7 +65,6 @@
#define TARGET_DEFAULT \
(MASK_HARDLIT \
- | MASK_8ALIGN \
| MASK_DIV \
| MASK_RELAX_IMM \
| MASK_M340 \
diff --git a/gcc/config/mcore/mcore.opt b/gcc/config/mcore/mcore.opt
index 1eae890..c445237 100644
--- a/gcc/config/mcore/mcore.opt
+++ b/gcc/config/mcore/mcore.opt
@@ -1,6 +1,6 @@
; Options for the Motorola MCore port of the compiler.
-; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+; Copyright (C) 2005, 2007, 2009 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
@@ -26,18 +26,10 @@ m340
Target RejectNegative Report Mask(M340)
Generate code for the M*Core M340
-m4align
-Target RejectNegative Report InverseMask(8ALIGN)
-Set maximum alignment to 4
-
m4byte-functions
Target Report Mask(OVERALIGN_FUNC)
Force functions to be aligned to a 4 byte boundary
-m8align
-Target RejectNegative Report Mask(8ALIGN)
-Set maximum alignment to 8
-
mbig-endian
Target RejectNegative Report InverseMask(LITTLE_END)
Generate big-endian code
@@ -60,7 +52,8 @@ Generate little-endian code
; Not used by the compiler proper.
mno-lsim
-Target RejectNegative Undocumented
+Target RejectNegative
+Assume that run-time support has been provided, so omit -lsim from the linker command line
mrelax-immediates
Target Report Mask(RELAX_IMM)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7f9229d..9dbd1a7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12438,6 +12438,20 @@ Generate code for a little endian target.
@opindex m210
@opindex m340
Generate code for the 210 processor.
+
+@item -mno-lsim
+@opindex no-lsim
+Assume that run-time support has been provided and so omit the
+simulator library (@file{libsim.a)} from the linker command line.
+
+@item -mstack-increment=@var{size}
+@opindex mstack-increment
+Set the maximum amount for a single stack increment operation. Large
+values can increase the speed of progrqams which contain functions
+that need a large amount of stack space, but they can also trigger a
+segmentation fault if the stack is extended too much. The default
+value is 0x1000.
+
@end table
@node MIPS Options