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author | J"orn Rennecke <amylaar@cygnus.co.uk> | 1998-04-27 10:26:39 +0000 |
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committer | Joern Rennecke <amylaar@gcc.gnu.org> | 1998-04-27 11:26:39 +0100 |
commit | 3d5a082089299a5eb71d377eba5abb9673639768 (patch) | |
tree | f32a9f1b36e8b31f588d8a9103bde6556099a10d | |
parent | 515d3c17839c92e67876331a2439ac48206cb4ea (diff) | |
download | gcc-3d5a082089299a5eb71d377eba5abb9673639768.zip gcc-3d5a082089299a5eb71d377eba5abb9673639768.tar.gz gcc-3d5a082089299a5eb71d377eba5abb9673639768.tar.bz2 |
sh.c (sh_expand_prologue, [...]): If TARGET_DOUBLE_ALIGN, preserve 64 bit stack alignment.
* sh.c (sh_expand_prologue, sh_expand_epilogue):
If TARGET_DOUBLE_ALIGN, preserve 64 bit stack alignment.
* sh.h (STACK_BOUNDARY): Likewise.
From-SVN: r19430
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/sh/sh.c | 19 | ||||
-rw-r--r-- | gcc/config/sh/sh.h | 2 | ||||
-rw-r--r-- | gcc/invoke.texi | 7 |
4 files changed, 28 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b71f1ad..0390e7a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Mon Apr 27 18:23:51 1998 J"orn Rennecke <amylaar@cygnus.co.uk> + + * sh.c (sh_expand_prologue, sh_expand_epilogue): + If TARGET_DOUBLE_ALIGN, preserve 64 bit stack alignment. + * sh.h (STACK_BOUNDARY): Likewise. + Mon Apr 27 17:22:48 1998 J"orn Rennecke <amylaar@cygnus.co.uk> * sh.h (LEGITIMIZE_RELOAD_ADDRESS): Define. diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 437164c..03f6b8a 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -3467,6 +3467,7 @@ sh_expand_prologue () int live_regs_mask; int d, i; int live_regs_mask2; + int double_align = 0; /* We have pretend args if we had an object sent partially in registers and partially on the stack, e.g. a large structure. */ @@ -3505,7 +3506,11 @@ sh_expand_prologue () live_regs_mask = calc_live_regs (&d, &live_regs_mask2); push_regs (live_regs_mask, live_regs_mask2); - output_stack_adjust (-get_frame_size (), stack_pointer_rtx, 3); + if (TARGET_ALIGN_DOUBLE && d & 1) + double_align = 4; + + output_stack_adjust (-get_frame_size () - double_align, + stack_pointer_rtx, 3); if (frame_pointer_needed) emit_insn (gen_movsi (frame_pointer_rtx, stack_pointer_rtx)); @@ -3518,10 +3523,16 @@ sh_expand_epilogue () int d, i; int live_regs_mask2; + int frame_size = get_frame_size (); + + live_regs_mask = calc_live_regs (&d, &live_regs_mask2); + + if (TARGET_ALIGN_DOUBLE && d & 1) + frame_size += 4; if (frame_pointer_needed) { - output_stack_adjust (get_frame_size (), frame_pointer_rtx, 7); + output_stack_adjust (frame_size, frame_pointer_rtx, 7); /* We must avoid moving the stack pointer adjustment past code which reads from the local frame, else an interrupt could @@ -3530,14 +3541,14 @@ sh_expand_epilogue () emit_insn (gen_blockage ()); emit_insn (gen_movsi (stack_pointer_rtx, frame_pointer_rtx)); } - else if (get_frame_size ()) + else if (frame_size) { /* We must avoid moving the stack pointer adjustment past code which reads from the local frame, else an interrupt could occur after the SP adjustment and clobber data in the local frame. */ emit_insn (gen_blockage ()); - output_stack_adjust (get_frame_size (), stack_pointer_rtx, 7); + output_stack_adjust (frame_size, stack_pointer_rtx, 7); } /* Pop all the registers. */ diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index b4e921c..dce9acb 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -231,7 +231,7 @@ do { \ #define PARM_BOUNDARY 32 /* Boundary (in *bits*) on which stack pointer should be aligned. */ -#define STACK_BOUNDARY 32 +#define STACK_BOUNDARY BIGGEST_ALIGNMENT /* The log (base 2) of the cache line size, in bytes. Processors prior to SH3 have no actual cache, but they fetch code in chunks of 4 bytes. */ diff --git a/gcc/invoke.texi b/gcc/invoke.texi index 52e2f8d..a7c9c2e 100644 --- a/gcc/invoke.texi +++ b/gcc/invoke.texi @@ -371,7 +371,7 @@ in the following sections. -mrelax -mh -ms -mint32 -malign-300 @emph{SH Options} --m1 -m2 -m3 -m3e -mb -ml -mrelax +-m1 -m2 -m3 -m3e -mb -ml -mdalign -mrelax @emph{System V Options} -Qy -Qn -YP,@var{paths} -Ym,@var{dir} @@ -5373,6 +5373,11 @@ Compile code for the processor in big endian mode. @item -ml Compile code for the processor in little endian mode. +@item -mdalign +Align doubles at 64 bit boundaries. Note that this changes the calling +conventions, and thus some functions from the standard C library will +not work unless you recompile it first with -mdalign. + @item -mrelax Shorten some address references at link time, when possible; uses the linker option @samp{-relax}. |