RISC-V: Add patterns for vector-scalar negate-(multiply-add/sub) [PR119100]

This pattern enables the combine pass (or late-combine, depending on the case)
to merge a vec_duplicate into a (possibly negated) minus-mult RTL instruction.

Before this patch, we have two instructions, e.g.:
  vfmv.v.f        v6,fa0
  vfnmadd.vv      v2,v6,v4

After, we get only one:
  vfnmadd.vf      v2,fa0,v4

This also fixes a sign mistake in the handling of vfmsub.

	PR target/119100

gcc/ChangeLog:

	* config/riscv/autovec-opt.md (*<optab>_vf_<mode>): Only handle vfmadd
	and vfmsub.
	(*vfnmsub_<mode>): New pattern.
	(*vfnmadd_<mode>): New pattern.
	* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add cost model for
	NEG and VEC_DUPLICATE.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfnmadd and
	vfnmsub.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h: Add support for neg
	variants. Fix sign for sub.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_data.h: Add data for neg
	variants. Fix data for sub.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_run.h: Rename x to f.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c: Add neg
	argument.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f32.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f64.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f32.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f64.c: Likewise.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c: New test.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f32.c: New test.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f64.c: New test.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c: New test.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f32.c: New test.
	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f64.c: New test.

29 files changed, 646 insertions, 73 deletions

diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md
index 4465eb2..e829313 100644
--- a/gcc/config/riscv/autovec-opt.md
+++ b/gcc/config/riscv/autovec-opt.md
@@ -1719,9 +1719,11 @@
 ;; Include
 ;; - vfmadd.vf
 ;; - vfmsub.vf
+;; - vfnmadd.vf
+;; - vfnmsub.vf
 ;; =============================================================================
 
-
+;; vfmadd.vf, vfmsub.vf
 (define_insn_and_split "*<optab>_vf_<mode>"
   [(set (match_operand:V_VLSF 0 "register_operand"		"=vd")
     (plus_minus:V_VLSF
@@ -1744,9 +1746,10 @@
   [(set_attr "type" "vfmuladd")]
 )
 
-(define_insn_and_split "*<optab>_vf_<mode>"
+;; vfnmsub.vf
+(define_insn_and_split "*vfnmsub_<mode>"
   [(set (match_operand:V_VLSF 0 "register_operand"		"=vd")
-    (plus_minus:V_VLSF
+    (minus:V_VLSF
 	    (match_operand:V_VLSF 3 "register_operand"		" vr")
 	    (mult:V_VLSF
 	      (vec_duplicate:V_VLSF
@@ -1759,7 +1762,31 @@
   {
     rtx ops[] = {operands[0], operands[1], operands[2], operands[3],
 		 operands[2]};
-    riscv_vector::emit_vlmax_insn (code_for_pred_mul_scalar (<CODE>, <MODE>mode),
+    riscv_vector::emit_vlmax_insn (code_for_pred_mul_neg_scalar (PLUS, <MODE>mode),
+				   riscv_vector::TERNARY_OP_FRM_DYN, ops);
+    DONE;
+  }
+  [(set_attr "type" "vfmuladd")]
+)
+
+;; vfnmadd.vf
+(define_insn_and_split "*vfnmadd_<mode>"
+  [(set (match_operand:V_VLSF 0 "register_operand"	"=vd")
+    (minus:V_VLSF
+      (mult:V_VLSF
+	(neg:V_VLSF
+	  (match_operand:V_VLSF 2 "register_operand"	"  0"))
+	(vec_duplicate:V_VLSF
+	  (match_operand:<VEL> 1 "register_operand"	"  f")))
+      (match_operand:V_VLSF 3 "register_operand"	" vr")))]
+  "TARGET_VECTOR && can_create_pseudo_p ()"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+  {
+    rtx ops[] = {operands[0], operands[1], operands[2], operands[3],
+		 operands[2]};
+    riscv_vector::emit_vlmax_insn (code_for_pred_mul_neg_scalar (MINUS, <MODE>mode),
 				   riscv_vector::TERNARY_OP_FRM_DYN, ops);
     DONE;
   }
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index d5ab128..0c99850 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3911,6 +3911,8 @@ get_vector_binary_rtx_cost (rtx x, int scalar2vr_cost)
   if (GET_CODE (op_0) == VEC_DUPLICATE
       || GET_CODE (op_1) == VEC_DUPLICATE)
     return (scalar2vr_cost + 1) * COSTS_N_INSNS (1);
+  else if (GET_CODE (op_0) == NEG && GET_CODE (op_1) == VEC_DUPLICATE)
+    return (scalar2vr_cost + 1) * COSTS_N_INSNS (1);
   else
     return COSTS_N_INSNS (1);
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c
index 821e5c5..09f4b71 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_0(_Float16, +, add)
-DEF_VF_MULOP_CASE_0(_Float16, -, sub)
+DEF_VF_MULOP_CASE_0 (_Float16, +, +, add)
+DEF_VF_MULOP_CASE_0 (_Float16, -, +, sub)
+DEF_VF_MULOP_CASE_0 (_Float16, +, -, nadd)
+DEF_VF_MULOP_CASE_0 (_Float16, -, -, nsub)
 
 /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */
 /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */
+/* { dg-final { scan-assembler-times {vfnmadd.vf} 1 } } */
+/* { dg-final { scan-assembler-times {vfnmsub.vf} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c
index 49b4287..b21ae49 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_0(float, +, add)
-DEF_VF_MULOP_CASE_0(float, -, sub)
+DEF_VF_MULOP_CASE_0 (float, +, +, add)
+DEF_VF_MULOP_CASE_0 (float, -, +, sub)
+DEF_VF_MULOP_CASE_0 (float, +, -, nadd)
+DEF_VF_MULOP_CASE_0 (float, -, -, nsub)
 
 /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */
 /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */
+/* { dg-final { scan-assembler-times {vfnmadd.vf} 1 } } */
+/* { dg-final { scan-assembler-times {vfnmsub.vf} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c
index 2bb5d89..56a44dd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_0(double, +, add)
-DEF_VF_MULOP_CASE_0(double, -, sub)
+DEF_VF_MULOP_CASE_0 (double, +, +, add)
+DEF_VF_MULOP_CASE_0 (double, -, +, sub)
+DEF_VF_MULOP_CASE_0 (double, +, -, nadd)
+DEF_VF_MULOP_CASE_0 (double, -, -, nsub)
 
 /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */
 /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */
+/* { dg-final { scan-assembler-times {vfnmadd.vf} 1 } } */
+/* { dg-final { scan-assembler-times {vfnmsub.vf} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c
index cbb43ca..22180cb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_0(_Float16, +, add)
-DEF_VF_MULOP_CASE_0(_Float16, -, sub)
+DEF_VF_MULOP_CASE_0 (_Float16, +, +, add)
+DEF_VF_MULOP_CASE_0 (_Float16, -, +, sub)
+DEF_VF_MULOP_CASE_0 (_Float16, +, -, nadd)
+DEF_VF_MULOP_CASE_0 (_Float16, -, -, nsub)
 
 /* { dg-final { scan-assembler-not {vfmadd.vf} } } */
 /* { dg-final { scan-assembler-not {vfmsub.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c
index 66ff9b8..318c281 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_0(float, +, add)
-DEF_VF_MULOP_CASE_0(float, -, sub)
+DEF_VF_MULOP_CASE_0 (float, +, +, add)
+DEF_VF_MULOP_CASE_0 (float, -, +, sub)
+DEF_VF_MULOP_CASE_0 (float, +, -, nadd)
+DEF_VF_MULOP_CASE_0 (float, -, -, nsub)
 
 /* { dg-final { scan-assembler-not {vfmadd.vf} } } */
 /* { dg-final { scan-assembler-not {vfmsub.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c
index 66ff9b8..318c281 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_0(float, +, add)
-DEF_VF_MULOP_CASE_0(float, -, sub)
+DEF_VF_MULOP_CASE_0 (float, +, +, add)
+DEF_VF_MULOP_CASE_0 (float, -, +, sub)
+DEF_VF_MULOP_CASE_0 (float, +, -, nadd)
+DEF_VF_MULOP_CASE_0 (float, -, -, nsub)
 
 /* { dg-final { scan-assembler-not {vfmadd.vf} } } */
 /* { dg-final { scan-assembler-not {vfmsub.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c
index 45980f4..382f7ef5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_1(_Float16, +, add, VF_MULOP_BODY_X16)
-DEF_VF_MULOP_CASE_1(_Float16, -, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, +, +, add, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, -, +, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, +, -, nadd, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, -, -, nsub, VF_MULOP_BODY_X16)
 
 /* { dg-final { scan-assembler {vfmadd.vf} } } */
 /* { dg-final { scan-assembler {vfmsub.vf} } } */
+/* { dg-final { scan-assembler {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c
index c853620..db2cd2e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_1(float, +, add, VF_MULOP_BODY_X16)
-DEF_VF_MULOP_CASE_1(float, -, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, +, +, add, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, -, +, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, +, -, nadd, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, -, -, nsub, VF_MULOP_BODY_X16)
 
 /* { dg-final { scan-assembler {vfmadd.vf} } } */
 /* { dg-final { scan-assembler {vfmsub.vf} } } */
+/* { dg-final { scan-assembler {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c
index d38ae8b..423b4db 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_1(double, +, add, VF_MULOP_BODY_X16)
-DEF_VF_MULOP_CASE_1(double, -, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, +, +, add, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, -, +, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, +, -, nadd, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, -, -, nsub, VF_MULOP_BODY_X16)
 
 /* { dg-final { scan-assembler {vfmadd.vf} } } */
 /* { dg-final { scan-assembler {vfmsub.vf} } } */
+/* { dg-final { scan-assembler {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c
index f1ca34e..1482ff0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_1(_Float16, +, add, VF_MULOP_BODY_X16)
-DEF_VF_MULOP_CASE_1(_Float16, -, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, +, +, add, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, -, +, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, +, -, nadd, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (_Float16, -, -, nsub, VF_MULOP_BODY_X16)
 
 /* { dg-final { scan-assembler-not {vfmadd.vf} } } */
 /* { dg-final { scan-assembler-not {vfmsub.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c
index 6730d4b..d1368e7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_1(float, +, add, VF_MULOP_BODY_X16)
-DEF_VF_MULOP_CASE_1(float, -, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, +, +, add, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, -, +, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, +, -, nadd, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (float, -, -, nsub, VF_MULOP_BODY_X16)
 
 /* { dg-final { scan-assembler-not {vfmadd.vf} } } */
 /* { dg-final { scan-assembler-not {vfmsub.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c
index bcb6a6e..8e4bdd4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c
@@ -3,8 +3,12 @@
 
 #include "vf_mulop.h"
 
-DEF_VF_MULOP_CASE_1(double, +, add, VF_MULOP_BODY_X16)
-DEF_VF_MULOP_CASE_1(double, -, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, +, +, add, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, -, +, sub, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, +, -, nadd, VF_MULOP_BODY_X16)
+DEF_VF_MULOP_CASE_1 (double, -, -, nsub, VF_MULOP_BODY_X16)
 
 /* { dg-final { scan-assembler-not {vfmadd.vf} } } */
 /* { dg-final { scan-assembler-not {vfmsub.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmadd.vf} } } */
+/* { dg-final { scan-assembler-not {vfnmsub.vf} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h
index 5253978..433a16e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h
@@ -3,59 +3,63 @@
 
 #include <stdint.h>
 
-#define DEF_VF_MULOP_CASE_0(T, OP, NAME)                                       \
-  void test_vf_mulop_##NAME##_##T##_case_0(T *restrict out, T *restrict in,    \
-                                           T x, unsigned n) {                  \
+#define DEF_VF_MULOP_CASE_0(T, OP, NEG, NAME)                                  \
+  void test_vf_mulop_##NAME##_##T##_case_0 (T *restrict out, T *restrict in,   \
+					    T f, unsigned n)                   \
+  {                                                                            \
     for (unsigned i = 0; i < n; i++)                                           \
-      out[i] = in[i] OP out[i] * x;                                            \
+      out[i] = NEG (f * out[i] OP in[i]);                                      \
   }
-#define DEF_VF_MULOP_CASE_0_WRAP(T, OP, NAME) DEF_VF_MULOP_CASE_0(T, OP, NAME)
+#define DEF_VF_MULOP_CASE_0_WRAP(T, OP, NEG, NAME)                             \
+  DEF_VF_MULOP_CASE_0 (T, OP, NEG, NAME)
 #define RUN_VF_MULOP_CASE_0(T, NAME, out, in, x, n)                            \
   test_vf_mulop_##NAME##_##T##_case_0(out, in, x, n)
 #define RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)                       \
   RUN_VF_MULOP_CASE_0(T, NAME, out, in, x, n)
 
-#define VF_MULOP_BODY(op)                                                      \
-  out[k + 0] = in[k + 0] op tmp * out[k + 0];                                  \
-  out[k + 1] = in[k + 1] op tmp * out[k + 1];                                  \
+#define VF_MULOP_BODY(op, neg)                                                 \
+  out[k + 0] = neg (tmp * out[k + 0] op in[k + 0]);                            \
+  out[k + 1] = neg (tmp * out[k + 1] op in[k + 1]);                            \
   k += 2;
 
-#define VF_MULOP_BODY_X4(op)                                                   \
-  VF_MULOP_BODY(op)                                                            \
-  VF_MULOP_BODY(op)
+#define VF_MULOP_BODY_X4(op, neg)                                              \
+  VF_MULOP_BODY (op, neg)                                                      \
+  VF_MULOP_BODY (op, neg)
 
-#define VF_MULOP_BODY_X8(op)                                                   \
-  VF_MULOP_BODY_X4(op)                                                         \
-  VF_MULOP_BODY_X4(op)
+#define VF_MULOP_BODY_X8(op, neg)                                              \
+  VF_MULOP_BODY_X4 (op, neg)                                                   \
+  VF_MULOP_BODY_X4 (op, neg)
 
-#define VF_MULOP_BODY_X16(op)                                                  \
-  VF_MULOP_BODY_X8(op)                                                         \
-  VF_MULOP_BODY_X8(op)
+#define VF_MULOP_BODY_X16(op, neg)                                             \
+  VF_MULOP_BODY_X8 (op, neg)                                                   \
+  VF_MULOP_BODY_X8 (op, neg)
 
-#define VF_MULOP_BODY_X32(op)                                                  \
-  VF_MULOP_BODY_X16(op)                                                        \
-  VF_MULOP_BODY_X16(op)
+#define VF_MULOP_BODY_X32(op, neg)                                             \
+  VF_MULOP_BODY_X16 (op, neg)                                                  \
+  VF_MULOP_BODY_X16 (op, neg)
 
-#define VF_MULOP_BODY_X64(op)                                                  \
-  VF_MULOP_BODY_X32(op)                                                        \
-  VF_MULOP_BODY_X32(op)
+#define VF_MULOP_BODY_X64(op, neg)                                             \
+  VF_MULOP_BODY_X32 (op, neg)                                                  \
+  VF_MULOP_BODY_X32 (op, neg)
 
-#define VF_MULOP_BODY_X128(op)                                                 \
-  VF_MULOP_BODY_X64(op)                                                        \
-  VF_MULOP_BODY_X64(op)
+#define VF_MULOP_BODY_X128(op, neg)                                            \
+  VF_MULOP_BODY_X64 (op, neg)                                                  \
+  VF_MULOP_BODY_X64 (op, neg)
 
-#define DEF_VF_MULOP_CASE_1(T, OP, NAME, BODY)                                       \
-  void test_vf_mulop_##NAME##_##T##_case_1(T *restrict out, T *restrict in,    \
-                                           T x, unsigned n) {                  \
+#define DEF_VF_MULOP_CASE_1(T, OP, NEG, NAME, BODY)                            \
+  void test_vf_mulop_##NAME##_##T##_case_1 (T *restrict out, T *restrict in,   \
+					    T x, unsigned n)                   \
+  {                                                                            \
     unsigned k = 0;                                                            \
     T tmp = x + 3;                                                             \
                                                                                \
-    while (k < n) {                                                            \
-      tmp = tmp * 0x3f;                                                        \
-      BODY(OP)                                                                 \
-    }                                                                          \
+    while (k < n)                                                              \
+      {                                                                        \
+	tmp = tmp * 0x3f;                                                      \
+	BODY (OP, NEG)                                                         \
+      }                                                                        \
   }
-#define DEF_VF_MULOP_CASE_1_WRAP(T, OP, NAME, BODY)                            \
-  DEF_VF_MULOP_CASE_1(T, OP, NAME, BODY)
+#define DEF_VF_MULOP_CASE_1_WRAP(T, OP, NEG, NAME, BODY)                       \
+  DEF_VF_MULOP_CASE_1 (T, OP, NEG, NAME, BODY)
 
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_data.h
index c16c1a9..ffa3d28 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_data.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_data.h
@@ -211,6 +211,408 @@ double TEST_MULOP_DATA(double, add)[][4][N] =
 _Float16 TEST_MULOP_DATA(_Float16, sub)[][4][N] =
 {
   {
+    {       5.94f16 },
+    {
+         -20.1f16,      -20.1f16,      -20.1f16,      -20.1f16,
+         -13.1f16,      -13.1f16,      -13.1f16,      -13.1f16,
+         -8.92f16,      -8.92f16,      -8.92f16,      -8.92f16,
+         -43.1f16,      -43.1f16,      -43.1f16,      -43.1f16,
+    },
+    {
+          7.44f16,       7.44f16,       7.44f16,       7.44f16,
+           5.9f16,        5.9f16,        5.9f16,        5.9f16,
+          6.81f16,       6.81f16,       6.81f16,       6.81f16,
+          9.03f16,       9.03f16,       9.03f16,       9.03f16,
+    },
+    {
+          64.2f16,       64.2f16,       64.2f16,       64.2f16,
+          48.1f16,       48.1f16,       48.1f16,       48.1f16,
+          49.4f16,       49.4f16,       49.4f16,       49.4f16,
+          96.7f16,       96.7f16,       96.7f16,       96.7f16,
+    }
+  },
+  {
+    {     0.0475f16 },
+    {
+       -0.0965f16,    -0.0965f16,    -0.0965f16,    -0.0965f16,
+         -0.23f16,      -0.23f16,      -0.23f16,      -0.23f16,
+        -0.267f16,     -0.267f16,     -0.267f16,     -0.267f16,
+        -0.455f16,     -0.455f16,     -0.455f16,     -0.455f16,
+    },
+    {
+        0.0748f16,     0.0748f16,     0.0748f16,     0.0748f16,
+        0.0372f16,     0.0372f16,     0.0372f16,     0.0372f16,
+        0.0183f16,     0.0183f16,     0.0183f16,     0.0183f16,
+        0.0411f16,     0.0411f16,     0.0411f16,     0.0411f16,
+    },
+    {
+           0.1f16,        0.1f16,        0.1f16,        0.1f16,
+         0.232f16,      0.232f16,      0.232f16,      0.232f16,
+         0.268f16,      0.268f16,      0.268f16,      0.268f16,
+         0.457f16,      0.457f16,      0.457f16,      0.457f16,
+    }
+  },
+  {
+    {   2.46e+01f16 },
+    {
+     -1.46e+02f16,  -1.46e+02f16,  -1.46e+02f16,  -1.46e+02f16,
+      3.66e+02f16,   3.66e+02f16,   3.66e+02f16,   3.66e+02f16,
+      3.47e+02f16,   3.47e+02f16,   3.47e+02f16,   3.47e+02f16,
+      6.24e+02f16,   6.24e+02f16,   6.24e+02f16,   6.24e+02f16,
+    },
+    {
+      6.17e+00f16,   6.17e+00f16,   6.17e+00f16,   6.17e+00f16,
+      2.46e+01f16,   2.46e+01f16,   2.46e+01f16,   2.46e+01f16,
+      1.99e+01f16,   1.99e+01f16,   1.99e+01f16,   1.99e+01f16,
+      3.29e+01f16,   3.29e+01f16,   3.29e+01f16,   3.29e+01f16,
+    },
+    {
+      2.97e+02f16,   2.97e+02f16,   2.97e+02f16,   2.97e+02f16,
+      2.39e+02f16,   2.39e+02f16,   2.39e+02f16,   2.39e+02f16,
+      1.42e+02f16,   1.42e+02f16,   1.42e+02f16,   1.42e+02f16,
+      1.85e+02f16,   1.85e+02f16,   1.85e+02f16,   1.85e+02f16,
+    }
+  },
+};
+
+float TEST_MULOP_DATA(float, sub)[][4][N] =
+{
+  {
+    {       5.96f },
+    {
+          7.74f,       7.74f,       7.74f,       7.74f,
+          -57.f,       -57.f,       -57.f,       -57.f,
+          32.7f,       32.7f,       32.7f,       32.7f,
+          2.44f,       2.44f,       2.44f,       2.44f,
+    },
+    {
+          7.37f,       7.37f,       7.37f,       7.37f,
+           5.6f,        5.6f,        5.6f,        5.6f,
+          9.07f,       9.07f,       9.07f,       9.07f,
+          2.87f,       2.87f,       2.87f,       2.87f,
+    },
+    {
+          36.2f,       36.2f,       36.2f,       36.2f,
+          90.4f,       90.4f,       90.4f,       90.4f,
+          21.3f,       21.3f,       21.3f,       21.3f,
+          14.6f,       14.6f,       14.6f,       14.6f,
+    }
+  },
+  {
+    {   3.00e-02f },
+    {
+     -2.83e-01f,  -2.83e-01f,  -2.83e-01f,  -2.83e-01f,
+     -5.37e-01f,  -5.37e-01f,  -5.37e-01f,  -5.37e-01f,
+     -7.87e-01f,  -7.87e-01f,  -7.87e-01f,  -7.87e-01f,
+     -3.65e-01f,  -3.65e-01f,  -3.65e-01f,  -3.65e-01f,
+    },
+    {
+      8.84e-02f,   8.84e-02f,   8.84e-02f,   8.84e-02f,
+      9.27e-02f,   9.27e-02f,   9.27e-02f,   9.27e-02f,
+      6.51e-02f,   6.51e-02f,   6.51e-02f,   6.51e-02f,
+      5.67e-02f,   5.67e-02f,   5.67e-02f,   5.67e-02f,
+    },
+    {
+      2.86e-01f,   2.86e-01f,   2.86e-01f,   2.86e-01f,
+      5.40e-01f,   5.40e-01f,   5.40e-01f,   5.40e-01f,
+      7.89e-01f,   7.89e-01f,   7.89e-01f,   7.89e-01f,
+      3.67e-01f,   3.67e-01f,   3.67e-01f,   3.67e-01f,
+    }
+  },
+  {
+    {   9.04e+01f },
+    {
+      2.76e+03f,   2.76e+03f,   2.76e+03f,   2.76e+03f,
+      1.05e+03f,   1.05e+03f,   1.05e+03f,   1.05e+03f,
+      5.17e+03f,   5.17e+03f,   5.17e+03f,   5.17e+03f,
+      3.91e+03f,   3.91e+03f,   3.91e+03f,   3.91e+03f,
+    },
+    {
+      3.99e+01f,   3.99e+01f,   3.99e+01f,   3.99e+01f,
+      1.38e+01f,   1.38e+01f,   1.38e+01f,   1.38e+01f,
+      6.36e+01f,   6.36e+01f,   6.36e+01f,   6.36e+01f,
+      4.77e+01f,   4.77e+01f,   4.77e+01f,   4.77e+01f,
+    },
+    {
+      8.39e+02f,   8.39e+02f,   8.39e+02f,   8.39e+02f,
+      1.97e+02f,   1.97e+02f,   1.97e+02f,   1.97e+02f,
+      5.77e+02f,   5.77e+02f,   5.77e+02f,   5.77e+02f,
+      4.02e+02f,   4.02e+02f,   4.02e+02f,   4.02e+02f,
+    }
+  },
+};
+
+double TEST_MULOP_DATA(double, sub)[][4][N] =
+{
+  {
+    {   1.69e+01 },
+    {
+      8.58e+02,   8.58e+02,   8.58e+02,   8.58e+02,
+      2.87e+02,   2.87e+02,   2.87e+02,   2.87e+02,
+      4.35e+02,   4.35e+02,   4.35e+02,   4.35e+02,
+     -6.35e+01,  -6.35e+01,  -6.35e+01,  -6.35e+01,
+    },
+    {
+      8.02e+01,   8.02e+01,   8.02e+01,   8.02e+01,
+      7.51e+01,   7.51e+01,   7.51e+01,   7.51e+01,
+      5.85e+01,   5.85e+01,   5.85e+01,   5.85e+01,
+      1.65e+01,   1.65e+01,   1.65e+01,   1.65e+01,
+    },
+    {
+      4.95e+02,   4.95e+02,   4.95e+02,   4.95e+02,
+      9.80e+02,   9.80e+02,   9.80e+02,   9.80e+02,
+      5.51e+02,   5.51e+02,   5.51e+02,   5.51e+02,
+      3.42e+02,   3.42e+02,   3.42e+02,   3.42e+02,
+    }
+  },
+  {
+    {   8.86e-10 },
+    {
+     -8.82e-09,  -8.82e-09,  -8.82e-09,  -8.82e-09,
+     -3.09e-09,  -3.09e-09,  -3.09e-09,  -3.09e-09,
+     -4.87e-09,  -4.87e-09,  -4.87e-09,  -4.87e-09,
+     -5.70e-09,  -5.70e-09,  -5.70e-09,  -5.70e-09,
+    },
+    {
+      9.72e-10,   9.72e-10,   9.72e-10,   9.72e-10,
+      5.78e-10,   5.78e-10,   5.78e-10,   5.78e-10,
+      1.10e-10,   1.10e-10,   1.10e-10,   1.10e-10,
+      4.62e-10,   4.62e-10,   4.62e-10,   4.62e-10,
+    },
+    {
+      8.82e-09,   8.82e-09,   8.82e-09,   8.82e-09,
+      3.09e-09,   3.09e-09,   3.09e-09,   3.09e-09,
+      4.87e-09,   4.87e-09,   4.87e-09,   4.87e-09,
+      5.70e-09,   5.70e-09,   5.70e-09,   5.70e-09,
+    }
+  },
+  {
+    {   1.09e-20 },
+    {
+     -5.46e-19,  -5.46e-19,  -5.46e-19,  -5.46e-19,
+     -2.28e-19,  -2.28e-19,  -2.28e-19,  -2.28e-19,
+     -4.77e-19,  -4.77e-19,  -4.77e-19,  -4.77e-19,
+     -1.76e-19,  -1.76e-19,  -1.76e-19,  -1.76e-19,
+    },
+    {
+      5.52e-20,   5.52e-20,   5.52e-20,   5.52e-20,
+      2.20e-20,   2.20e-20,   2.20e-20,   2.20e-20,
+      2.97e-20,   2.97e-20,   2.97e-20,   2.97e-20,
+      3.23e-20,   3.23e-20,   3.23e-20,   3.23e-20,
+    },
+    {
+      5.46e-19,   5.46e-19,   5.46e-19,   5.46e-19,
+      2.28e-19,   2.28e-19,   2.28e-19,   2.28e-19,
+      4.77e-19,   4.77e-19,   4.77e-19,   4.77e-19,
+      1.76e-19,   1.76e-19,   1.76e-19,   1.76e-19,
+    }
+  },
+};
+
+_Float16 TEST_MULOP_DATA(_Float16, nadd)[][4][N] =
+{
+  {
+    {       1.09f16 },
+    {
+         -60.7f16,      -60.7f16,      -60.7f16,      -60.7f16,
+         -25.2f16,      -25.2f16,      -25.2f16,      -25.2f16,
+         -50.9f16,      -50.9f16,      -50.9f16,      -50.9f16,
+         -21.1f16,      -21.1f16,      -21.1f16,      -21.1f16,
+    },
+    {
+          5.52f16,       5.52f16,       5.52f16,       5.52f16,
+           2.2f16,        2.2f16,        2.2f16,        2.2f16,
+          2.97f16,       2.97f16,       2.97f16,       2.97f16,
+          3.23f16,       3.23f16,       3.23f16,       3.23f16,
+    },
+    {
+          54.6f16,       54.6f16,       54.6f16,       54.6f16,
+          22.8f16,       22.8f16,       22.8f16,       22.8f16,
+          47.7f16,       47.7f16,       47.7f16,       47.7f16,
+          17.6f16,       17.6f16,       17.6f16,       17.6f16,
+    }
+  },
+  {
+    {      0.794f16 },
+    {
+          -6.8f16,       -6.8f16,       -6.8f16,       -6.8f16,
+          -6.1f16,       -6.1f16,       -6.1f16,       -6.1f16,
+         -3.02f16,      -3.02f16,      -3.02f16,      -3.02f16,
+         -3.15f16,      -3.15f16,      -3.15f16,      -3.15f16,
+    },
+    {
+         0.119f16,      0.119f16,      0.119f16,      0.119f16,
+         0.774f16,      0.774f16,      0.774f16,      0.774f16,
+         0.302f16,      0.302f16,      0.302f16,      0.302f16,
+         0.784f16,      0.784f16,      0.784f16,      0.784f16,
+    },
+    {
+           6.7f16,        6.7f16,        6.7f16,        6.7f16,
+          5.49f16,       5.49f16,       5.49f16,       5.49f16,
+          2.78f16,       2.78f16,       2.78f16,       2.78f16,
+          2.52f16,       2.52f16,       2.52f16,       2.52f16,
+    }
+  },
+  {
+    {      -2.62f16 },
+    {
+          48.6f16,       48.6f16,       48.6f16,       48.6f16,
+          28.1f16,       28.1f16,       28.1f16,       28.1f16,
+         -2.93f16,      -2.93f16,      -2.93f16,      -2.93f16,
+          80.6f16,       80.6f16,       80.6f16,       80.6f16,
+    },
+    {
+         -1.18f16,      -1.18f16,      -1.18f16,      -1.18f16,
+         -7.52f16,      -7.52f16,      -7.52f16,      -7.52f16,
+         -5.37f16,      -5.37f16,      -5.37f16,      -5.37f16,
+         -5.39f16,      -5.39f16,      -5.39f16,      -5.39f16,
+    },
+    {
+         -51.7f16,      -51.7f16,      -51.7f16,      -51.7f16,
+         -47.8f16,      -47.8f16,      -47.8f16,      -47.8f16,
+         -11.2f16,      -11.2f16,      -11.2f16,      -11.2f16,
+         -94.8f16,      -94.8f16,      -94.8f16,      -94.8f16,
+    }
+  },
+};
+
+float TEST_MULOP_DATA(float, nadd)[][4][N] =
+{
+  {
+    {       1.19f },
+    {
+         -21.4f,      -21.4f,      -21.4f,      -21.4f,
+         -9.12f,      -9.12f,      -9.12f,      -9.12f,
+         -51.1f,      -51.1f,      -51.1f,      -51.1f,
+         -48.8f,      -48.8f,      -48.8f,      -48.8f,
+    },
+    {
+          3.83f,       3.83f,       3.83f,       3.83f,
+           2.9f,        2.9f,        2.9f,        2.9f,
+          4.63f,       4.63f,       4.63f,       4.63f,
+          0.65f,       0.65f,       0.65f,       0.65f,
+    },
+    {
+          16.8f,       16.8f,       16.8f,       16.8f,
+          5.66f,       5.66f,       5.66f,       5.66f,
+          45.5f,       45.5f,       45.5f,       45.5f,
+          48.1f,       48.1f,       48.1f,       48.1f,
+    }
+  },
+  {
+    {   1.60e+01f },
+    {
+     -2.69e+02f,  -2.69e+02f,  -2.69e+02f,  -2.69e+02f,
+     -5.05e+02f,  -5.05e+02f,  -5.05e+02f,  -5.05e+02f,
+     -2.92e+02f,  -2.92e+02f,  -2.92e+02f,  -2.92e+02f,
+     -3.91e+02f,  -3.91e+02f,  -3.91e+02f,  -3.91e+02f,
+    },
+    {
+      6.28e+00f,   6.28e+00f,   6.28e+00f,   6.28e+00f,
+      1.94e+01f,   1.94e+01f,   1.94e+01f,   1.94e+01f,
+      1.02e+01f,   1.02e+01f,   1.02e+01f,   1.02e+01f,
+      1.60e+01f,   1.60e+01f,   1.60e+01f,   1.60e+01f,
+    },
+    {
+      1.68e+02f,   1.68e+02f,   1.68e+02f,   1.68e+02f,
+      1.95e+02f,   1.95e+02f,   1.95e+02f,   1.95e+02f,
+      1.30e+02f,   1.30e+02f,   1.30e+02f,   1.30e+02f,
+      1.35e+02f,   1.35e+02f,   1.35e+02f,   1.35e+02f,
+    }
+  },
+  {
+    {  -5.63e+01f },
+    {
+     -3.59e+03f,  -3.59e+03f,  -3.59e+03f,  -3.59e+03f,
+     -2.25e+02f,  -2.25e+02f,  -2.25e+02f,  -2.25e+02f,
+     -4.85e+03f,  -4.85e+03f,  -4.85e+03f,  -4.85e+03f,
+     -1.59e+03f,  -1.59e+03f,  -1.59e+03f,  -1.59e+03f,
+    },
+    {
+     -7.96e+01f,  -7.96e+01f,  -7.96e+01f,  -7.96e+01f,
+     -1.07e+01f,  -1.07e+01f,  -1.07e+01f,  -1.07e+01f,
+     -9.62e+01f,  -9.62e+01f,  -9.62e+01f,  -9.62e+01f,
+     -3.86e+01f,  -3.86e+01f,  -3.86e+01f,  -3.86e+01f,
+    },
+    {
+     -8.83e+02f,  -8.83e+02f,  -8.83e+02f,  -8.83e+02f,
+     -3.79e+02f,  -3.79e+02f,  -3.79e+02f,  -3.79e+02f,
+     -5.62e+02f,  -5.62e+02f,  -5.62e+02f,  -5.62e+02f,
+     -5.85e+02f,  -5.85e+02f,  -5.85e+02f,  -5.85e+02f,
+    }
+  },
+};
+
+double TEST_MULOP_DATA(double, nadd)[][4][N] =
+{
+  {
+    {   8.64e+20 },
+    {
+     -2.89e+41,  -2.89e+41,  -2.89e+41,  -2.89e+41,
+     -6.50e+41,  -6.50e+41,  -6.50e+41,  -6.50e+41,
+     -8.11e+41,  -8.11e+41,  -8.11e+41,  -8.11e+41,
+     -4.44e+41,  -4.44e+41,  -4.44e+41,  -4.44e+41,
+    },
+    {
+      2.61e+20,   2.61e+20,   2.61e+20,   2.61e+20,
+      4.25e+20,   4.25e+20,   4.25e+20,   4.25e+20,
+      5.77e+20,   5.77e+20,   5.77e+20,   5.77e+20,
+      3.74e+20,   3.74e+20,   3.74e+20,   3.74e+20,
+    },
+    {
+      6.38e+40,   6.38e+40,   6.38e+40,   6.38e+40,
+      2.83e+41,   2.83e+41,   2.83e+41,   2.83e+41,
+      3.13e+41,   3.13e+41,   3.13e+41,   3.13e+41,
+      1.21e+41,   1.21e+41,   1.21e+41,   1.21e+41,
+    }
+  },
+  {
+    {  -3.01e+40 },
+    {
+     -7.27e+81,  -7.27e+81,  -7.27e+81,  -7.27e+81,
+     -4.10e+81,  -4.10e+81,  -4.10e+81,  -4.10e+81,
+     -7.82e+81,  -7.82e+81,  -7.82e+81,  -7.82e+81,
+     -1.54e+81,  -1.54e+81,  -1.54e+81,  -1.54e+81,
+    },
+    {
+     -5.71e+40,  -5.71e+40,  -5.71e+40,  -5.71e+40,
+     -1.41e+40,  -1.41e+40,  -1.41e+40,  -1.41e+40,
+     -3.01e+40,  -3.01e+40,  -3.01e+40,  -3.01e+40,
+     -2.47e+40,  -2.47e+40,  -2.47e+40,  -2.47e+40,
+    },
+    {
+      5.55e+81,   5.55e+81,   5.55e+81,   5.55e+81,
+      3.67e+81,   3.67e+81,   3.67e+81,   3.67e+81,
+      6.92e+81,   6.92e+81,   6.92e+81,   6.92e+81,
+      7.96e+80,   7.96e+80,   7.96e+80,   7.96e+80,
+    }
+  },
+  {
+    {   3.65e-20 },
+    {
+     -4.11e-39,  -4.11e-39,  -4.11e-39,  -4.11e-39,
+     -8.48e-39,  -8.48e-39,  -8.48e-39,  -8.48e-39,
+     -8.93e-39,  -8.93e-39,  -8.93e-39,  -8.93e-39,
+     -2.74e-39,  -2.74e-39,  -2.74e-39,  -2.74e-39,
+    },
+    {
+      5.78e-20,   5.78e-20,   5.78e-20,   5.78e-20,
+      1.61e-20,   1.61e-20,   1.61e-20,   1.61e-20,
+      6.91e-20,   6.91e-20,   6.91e-20,   6.91e-20,
+      6.18e-20,   6.18e-20,   6.18e-20,   6.18e-20,
+    },
+    {
+      2.00e-39,   2.00e-39,   2.00e-39,   2.00e-39,
+      7.89e-39,   7.89e-39,   7.89e-39,   7.89e-39,
+      6.41e-39,   6.41e-39,   6.41e-39,   6.41e-39,
+      4.87e-40,   4.87e-40,   4.87e-40,   4.87e-40,
+    }
+  },
+};
+
+_Float16 TEST_MULOP_DATA(_Float16, nsub)[][4][N] =
+{
+  {
     {      0.676f16 },
     {
           1.39f16,       1.39f16,       1.39f16,       1.39f16,
@@ -275,7 +677,7 @@ _Float16 TEST_MULOP_DATA(_Float16, sub)[][4][N] =
   },
 };
 
-float TEST_MULOP_DATA(float, sub)[][4][N] =
+float TEST_MULOP_DATA(float, nsub)[][4][N] =
 {
   {
   {8.51f },
@@ -342,7 +744,7 @@ float TEST_MULOP_DATA(float, sub)[][4][N] =
   },
 };
 
-double TEST_MULOP_DATA(double, sub)[][4][N] =
+double TEST_MULOP_DATA(double, nsub)[][4][N] =
 {
   {
     { 80.54 },
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_run.h
index bc6f483d..579f841 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_run.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_run.h
@@ -13,12 +13,12 @@ main ()
 
   for (i = 0; i < sizeof (TEST_DATA) / sizeof (TEST_DATA[0]); i++)
     {
-      T x = TEST_DATA[i][0][0];
+      T f = TEST_DATA[i][0][0];
       T *in = TEST_DATA[i][1];
       T *out = TEST_DATA[i][2];
       T *expect = TEST_DATA[i][3];
 
-      TEST_RUN (T, NAME, out, in, x, N);
+      TEST_RUN (T, NAME, out, in, f, N);
 
       for (k = 0; k < N; k++)
 	{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c
index 1bcf9e0..9ec5303 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c
@@ -7,7 +7,7 @@
 #define T    _Float16
 #define NAME add
 
-DEF_VF_MULOP_CASE_0_WRAP(T, +, NAME)
+DEF_VF_MULOP_CASE_0_WRAP (T, +, +, NAME)
 
 #define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
 #define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f32.c
index 199b9ad..222efec 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f32.c
@@ -7,7 +7,7 @@
 #define T    float
 #define NAME add
 
-DEF_VF_MULOP_CASE_0_WRAP(T, +, NAME)
+DEF_VF_MULOP_CASE_0_WRAP (T, +, +, NAME)
 
 #define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
 #define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f64.c
index 3857f58..300d520 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f64.c
@@ -7,7 +7,7 @@
 #define T    double
 #define NAME add
 
-DEF_VF_MULOP_CASE_0_WRAP(T, +, NAME)
+DEF_VF_MULOP_CASE_0_WRAP (T, +, +, NAME)
 
 #define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
 #define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c
index 671c7d8..d11d446 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c
@@ -7,7 +7,7 @@
 #define T    _Float16
 #define NAME sub
 
-DEF_VF_MULOP_CASE_0_WRAP(T, -, NAME)
+DEF_VF_MULOP_CASE_0_WRAP (T, -, +, NAME)
 
 #define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
 #define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f32.c
index f896963..500e1b2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f32.c
@@ -7,7 +7,7 @@
 #define T    float
 #define NAME sub
 
-DEF_VF_MULOP_CASE_0_WRAP(T, -, NAME)
+DEF_VF_MULOP_CASE_0_WRAP (T, -, +, NAME)
 
 #define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
 #define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f64.c
index b42ab1e..a2c3294 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f64.c
@@ -7,7 +7,7 @@
 #define T    double
 #define NAME sub
 
-DEF_VF_MULOP_CASE_0_WRAP(T, -, NAME)
+DEF_VF_MULOP_CASE_0_WRAP (T, -, +, NAME)
 
 #define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
 #define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c
new file mode 100644
index 0000000..a45e1f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "--param=fpr2vr-cost=0" } */
+
+#include "vf_mulop.h"
+#include "vf_mulop_data.h"
+
+#define T    _Float16
+#define NAME nadd
+
+DEF_VF_MULOP_CASE_0_WRAP(T, +, -, NAME)
+
+#define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vf_mulop_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f32.c
new file mode 100644
index 0000000..b8a7bc4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "--param=fpr2vr-cost=0" } */
+
+#include "vf_mulop.h"
+#include "vf_mulop_data.h"
+
+#define T    float
+#define NAME nadd
+
+DEF_VF_MULOP_CASE_0_WRAP (T, +, -, NAME)
+
+#define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vf_mulop_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f64.c
new file mode 100644
index 0000000..32664e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "--param=fpr2vr-cost=0" } */
+
+#include "vf_mulop.h"
+#include "vf_mulop_data.h"
+
+#define T    double
+#define NAME nadd
+
+DEF_VF_MULOP_CASE_0_WRAP (T, +, -, NAME)
+
+#define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vf_mulop_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c
new file mode 100644
index 0000000..a1b0034
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "--param=fpr2vr-cost=0" } */
+
+#include "vf_mulop.h"
+#include "vf_mulop_data.h"
+
+#define T    _Float16
+#define NAME nsub
+
+DEF_VF_MULOP_CASE_0_WRAP (T, -, -, NAME)
+
+#define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vf_mulop_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f32.c
new file mode 100644
index 0000000..6450573
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "--param=fpr2vr-cost=0" } */
+
+#include "vf_mulop.h"
+#include "vf_mulop_data.h"
+
+#define T    float
+#define NAME nsub
+
+DEF_VF_MULOP_CASE_0_WRAP (T, -, -, NAME)
+
+#define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vf_mulop_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f64.c
new file mode 100644
index 0000000..eb3ca1c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "--param=fpr2vr-cost=0" } */
+
+#include "vf_mulop.h"
+#include "vf_mulop_data.h"
+
+#define T    double
+#define NAME nsub
+
+DEF_VF_MULOP_CASE_0_WRAP (T, -, -, NAME)
+
+#define TEST_DATA                        TEST_MULOP_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VF_MULOP_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vf_mulop_run.h"