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authorKyrylo Tkachov <ktkachov@gcc.gnu.org>2017-12-19 16:58:22 +0000
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>2017-12-19 16:58:22 +0000
commit3a3a8086bed05ffc8d24bb6908e4437bd9e982f7 (patch)
tree51e517e0af38cf0dea1b64d47ade9c0235f32191
parent972027748c2aa9f59ef1ab534763b0d6ed37b76d (diff)
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[arm] PR target/82975: Guard against reg_renumber being NULL in arm.h
In this bug we ICE when checking REGNO_OK_FOR_INDEX_P on arm during pre-IRA scheduling. This is because REGNO_OK_FOR_INDEX_P ends up checking the reg_renumber array. Before IRA reg_renumber is NULL and thus we segfault. The fix is to guard the use of reg_renumber in the logic in TEST_REGNO in arm.h. On aarch64, for example, we also guard against the reg_renumber == NULL case. This fixes the ICE. I also remove the part of the comment that muses on when reg_renumber is available as with this patch it should now be safe to use at any point. Bootstrapped and tested on arm-none-linux-gnueabihf. PR target/82975 * config/arm/arm.h (TEST_REGNO): Check reg_renumber is set before accessing it. Adjust comment. * gcc.dg/pr82975.c: New test. From-SVN: r255830
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/arm/arm.h3
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.dg/pr82975.c19
4 files changed, 33 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 31277b9..76dbd69 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,10 @@
-2017-12-18 Jakub Jelinek <jakub@redhat.com>
+2017-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/82975
+ * config/arm/arm.h (TEST_REGNO): Check reg_renumber is set before
+ accessing it. Adjust comment.
+
+2017-12-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/81914
* predict.c (zero_one_minusone): New function.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index ac51412..a482f03 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1620,7 +1620,8 @@ enum arm_auto_incmodes
has been allocated, which happens in reginfo.c during register
allocation. */
#define TEST_REGNO(R, TEST, VALUE) \
- ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))
+ ((R TEST VALUE) \
+ || (reg_renumber && ((unsigned) reg_renumber[R] TEST VALUE)))
/* Don't allow the pc to be used. */
#define ARM_REGNO_OK_FOR_BASE_P(REGNO) \
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 200a813..e0eb513 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/82975
+ * gcc.dg/pr82975.c: New test.
+
2017-12-19 Marek Polacek <polacek@redhat.com>
PR c++/83489
diff --git a/gcc/testsuite/gcc.dg/pr82975.c b/gcc/testsuite/gcc.dg/pr82975.c
new file mode 100644
index 0000000..e6c13bc
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr82975.c
@@ -0,0 +1,19 @@
+/* PR target/82975. */
+/* { dg-do compile } */
+/* { dg-options "-mtune=cortex-a57 -fno-sched-pressure -O2" } */
+
+typedef __SIZE_TYPE__ size_t;
+
+struct S1
+{
+ char pad1;
+ char val;
+ short pad2;
+};
+
+extern char t[256];
+
+void foo (struct S1 a, size_t i)
+{
+ t[i] = a.val;
+}