aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorClaudiu Zissulescu <claziss@synopsys.com>2021-06-04 10:12:32 +0300
committerClaudiu Zissulescu <claziss@synopsys.com>2021-06-04 10:12:32 +0300
commit39e5a954c156f7af16aa1a8f87405433d8031c4e (patch)
treeb6421fa61a66925a86c16ea5efc4fc7b8b7d748e
parent9080a3bf23297885fdc47221da37a71d6dec93c5 (diff)
downloadgcc-39e5a954c156f7af16aa1a8f87405433d8031c4e.zip
gcc-39e5a954c156f7af16aa1a8f87405433d8031c4e.tar.gz
gcc-39e5a954c156f7af16aa1a8f87405433d8031c4e.tar.bz2
arc: Don't allow millicode thunks with reduced register set CPUs.
The millicode thunks are not reduced register set safe. Disable them for CPUs having this option on. gcc/ 2021-06-04 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.c (arc_override_options): Disable millicode thunks when RF16 is on. Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
-rw-r--r--gcc/config/arc/arc.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index b77d056..0d34c96 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -1451,8 +1451,10 @@ arc_override_options (void)
if (TARGET_ARC700 && (arc_tune != ARC_TUNE_ARC7XX))
flag_delayed_branch = 0;
- /* Millicode thunks doesn't work with long calls. */
- if (TARGET_LONG_CALLS_SET)
+ /* Millicode thunks doesn't work for long calls. */
+ if (TARGET_LONG_CALLS_SET
+ /* neither for RF16. */
+ || TARGET_RF16)
target_flags &= ~MASK_MILLICODE_THUNK_SET;
/* Set unaligned to all HS cpus. */