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author | Jakub Jelinek <jakub@redhat.com> | 2025-04-09 15:43:48 +0200 |
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committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2025-04-09 15:43:48 +0200 |
commit | 39deb26060ecf9c055489e96fa1d9c1d641ecefe (patch) | |
tree | e8b9d17f4f0902487cb228d60062c942d9ee3151 | |
parent | 088887de7717a22b1503760e9b79dfbe22a0f428 (diff) | |
download | gcc-39deb26060ecf9c055489e96fa1d9c1d641ecefe.zip gcc-39deb26060ecf9c055489e96fa1d9c1d641ecefe.tar.gz gcc-39deb26060ecf9c055489e96fa1d9c1d641ecefe.tar.bz2 |
riscv: Fix r15-9270 fallout on RISC-V
On Wed, Apr 09, 2025 at 02:38:01PM +0200, Mark Wielaard wrote:
> Unfortunately this seems to have broken the riscv bootstrap:
> https://builder.sourceware.org/buildbot/#/builders/337/builds/105
>
> ../../gcc/gcc/config/riscv/riscv-vector-builtins.cc:4730:10: error: enumeration value ‘TCTX_OMP_MAP’ not handled in switch [-Werror=switch]
> 4730 | switch (context)
> | ^
> ../../gcc/gcc/config/riscv/riscv-vector-builtins.cc:4730:10: error: enumeration value ‘TCTX_OMP_MAP_IMP_REF’ not handled in switch [-Werror=switch]
> ../../gcc/gcc/config/riscv/riscv-vector-builtins.cc:4730:10: error: enumeration value ‘TCTX_OMP_PRIVATE’ not handled in switch [-Werror=switch]
> ../../gcc/gcc/config/riscv/riscv-vector-builtins.cc:4730:10: error: enumeration value ‘TCTX_OMP_FIRSTPRIVATE’ not handled in switch [-Werror=switch]
> ../../gcc/gcc/config/riscv/riscv-vector-builtins.cc:4730:10: error: enumeration value ‘TCTX_OMP_DEVICE_ADDR’ not handled in switch [-Werror=switch]
> cc1plus: all warnings being treated as errors
Indeed, riscv-vector-builtins.cc IMHO needs pretty much the same
changes as aarch64, just with s/SVE/RVV/g.
I've also left out default: break; so that it is caught next time
somebody adds further enumerators.
2025-04-09 Jakub Jelinek <jakub@redhat.com>
* config/riscv/riscv-vector-builtins.cc (verify_type_context):
Diagnose RVV types for a given OpenMP context.
-rw-r--r-- | gcc/config/riscv/riscv-vector-builtins.cc | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc index d2fe849..61dcdab 100644 --- a/gcc/config/riscv/riscv-vector-builtins.cc +++ b/gcc/config/riscv/riscv-vector-builtins.cc @@ -4724,7 +4724,11 @@ bool verify_type_context (location_t loc, type_context_kind context, const_tree type, bool silent_p) { - if (!sizeless_type_p (type)) + const_tree tmp = type; + if (omp_type_context (context) && POINTER_TYPE_P (type)) + tmp = strip_pointer_types (tmp); + + if (!sizeless_type_p (tmp)) return true; switch (context) @@ -4796,6 +4800,34 @@ verify_type_context (location_t loc, type_context_kind context, const_tree type, error_at (loc, "capture by copy of RVV type %qT", type); return false; + + case TCTX_OMP_MAP: + if (!silent_p) + error_at (loc, "RVV type %qT not allowed in %<map%> clause", type); + return false; + + case TCTX_OMP_MAP_IMP_REF: + if (!silent_p) + error ("cannot reference %qT object types in %<target%> region", type); + return false; + + case TCTX_OMP_PRIVATE: + if (!silent_p) + error_at (loc, "RVV type %qT not allowed in" + " %<target%> %<private%> clause", type); + return false; + + case TCTX_OMP_FIRSTPRIVATE: + if (!silent_p) + error_at (loc, "RVV type %qT not allowed in" + " %<target%> %<firstprivate%> clause", type); + return false; + + case TCTX_OMP_DEVICE_ADDR: + if (!silent_p) + error_at (loc, "RVV type %qT not allowed in" + " %<target%> device clauses", type); + return false; } gcc_unreachable (); |