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| author | liuhongt <hongtao.liu@intel.com> | 2025-01-15 19:09:24 -0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2025-01-16 00:18:04 -0800 |
| commit | 3872daa5767622d1f8b086050996c85604db7514 (patch) | |
| tree | 2c9042abefa27f62d05daab7619d433c11de3865 | |
| parent | 1b5d2ccd060ce983c7459ee165275e0205271396 (diff) | |
| download | gcc-3872daa5767622d1f8b086050996c85604db7514.zip gcc-3872daa5767622d1f8b086050996c85604db7514.tar.gz gcc-3872daa5767622d1f8b086050996c85604db7514.tar.bz2 | |
Fix typo to avoid ICE.
gcc/ChangeLog:
PR target/118489
* config/i386/sse.md (VF1_AVX512BW): Fix typo.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr118489.c: New test.
| -rw-r--r-- | gcc/config/i386/sse.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr118489.c | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f8f2ba3..1461778 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -540,7 +540,7 @@ [(V16SF "TARGET_EVEX512") (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")]) (define_mode_iterator VF1_AVX512BW - [(V16SF "TARGET_EVEX512 && TARGET_EVEX512") (V8SF "TARGET_AVX2") V4SF]) + [(V16SF "TARGET_AVX512BW && TARGET_EVEX512") (V8SF "TARGET_AVX2") V4SF]) (define_mode_iterator VF1_AVX10_2 [(V16SF "TARGET_AVX10_2_512") V8SF V4SF]) diff --git a/gcc/testsuite/gcc.target/i386/pr118489.c b/gcc/testsuite/gcc.target/i386/pr118489.c new file mode 100644 index 0000000..6d8503b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr118489.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2 -ffinite-math-only " } */ + +typedef float v16sf __attribute__((vector_size(64))); +__attribute__((__vector_size__(16 * sizeof(__bf16)))) __bf16 foo3_mem_a; +v16sf foo3_mem() +{ + return __builtin_convertvector(foo3_mem_a, v16sf); +} |