Daily bump.

12 files changed, 418 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1e3f28f..559f739 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,173 @@
+2021-01-15  Carl Love  <cel@us.ibm.com>
+
+	* config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod):
+	New defines.
+	* config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
+	* config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI,
+	DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI,
+	DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI,
+	MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI):
+	Add builtin define.
+	(MULH, DIVE, MOD):  Add new BU_P10_OVERLOAD_2 definitions.
+	* config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
+	VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH):
+	New overloaded definitions.
+	(builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI,
+	P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI,
+	P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI,
+	P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI,
+	P10V_BUILTIN_MULHU_V4SI]: Add case
+	statement for builtins.
+	* config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI.
+	* config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md.
+	(UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions.
+	(vsx_mul_v2di): Add if TARGET_POWER10 statement.
+	(vsx_udiv_v2di): Add if TARGET_POWER10 statement.
+	(dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3,
+	mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3):
+	Add define_insn, mode is VIlong.
+	* doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod):
+	Add builtin descriptions.
+
+2021-01-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* final.c (final_start_function_1): Reset force_source_line.
+
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/96669
+	* match.pd (((1 << A) & 1) != 0 -> A == 0,
+	((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by
+	possibly different power of two constants and to right shift too.
+
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/96681
+	* match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification.
+	((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise.
+	((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise.
+	((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise.
+
+2021-01-15  Alexandre Oliva  <oliva@adacore.com>
+
+	* opts.c (gen_command_line_string): Exclude -dumpbase-ext.
+
+2021-01-15  Tamar Christina  <tamar.christina@arm.com>
+
+	* config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4,
+	cmul<conj_op><mode>3): New.
+	* config/aarch64/iterators.md (UNSPEC_FCMUL,
+	UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ,
+	UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180,
+	FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1,
+	sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New.
+	(rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180.
+	(rot_op): Renamed to conj_op.
+	* config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4,
+	cmul<conj_op><mode>3): New.
+	* config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4,
+	cmul<conj_op><mode>3): New.
+
+2021-01-15  David Malcolm  <dmalcolm@redhat.com>
+
+	PR bootstrap/98696
+	* diagnostic.c
+	(selftest::test_print_parseable_fixits_bytes_vs_display_columns):
+	Escape the tempfile name when constructing the expected output.
+
+2021-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>):
+	Rename to...
+	(aarch64_<su>mlsl_hi<mode>): ... This.
+	(aarch64_<su>mlsl_hi<mode>): Define.
+	(*aarch64_<su>mlsl<mode): Rename to...
+	(aarch64_<su>mlsl<mode): ... This.
+	* config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl,
+	smlsl_hi, umlsl_hi): Define builtins.
+	* config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16,
+	vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32,
+	vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8,
+	vmlsl_u16, vmlsl_u32): Reimplement with builtins.
+
+2021-01-15  Uroš Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386-c.c (ix86_target_macros):
+	Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition.
+
+2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/88836
+	* config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs.
+	* Makefile.in (RTL_SSA_H): New variable.
+	* config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule.
+	* config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare.
+	* config/aarch64/aarch64-passes.def: Add pass_cc_fusion after
+	pass_combine.
+	* config/aarch64/aarch64-cc-fusion.cc: New file.
+
+2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* recog.h (insn_change_watermark::~insn_change_watermark): Avoid
+	calling cancel_changes for changes that no longer exist.
+
+2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* rtl-ssa/functions.h (function_info::ref_defs): Rename to...
+	(function_info::reg_defs): ...this.
+	* rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to...
+	(function_info::reg_defs): ...this.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/71233
+	* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	Revert:
+	2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/71233
+	* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/96376
+	* tree-vect-stmts.c (get_load_store_type): Disregard alignment
+	for VMAT_INVARIANT.
+
+2021-01-15  Martin Liska  <mliska@suse.cz>
+
+	* doc/install.texi: Document that some tests need pytest module.
+	* doc/sourcebuild.texi: Likewise.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/71233
+	* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry.
+	(mve_vshrq_n_u<mode>_imm): Likewise.
+	* config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ...
+	* config/arm/vec-common.md: ... here.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* config/arm/mve.md (mve_vshlq_<supf><mode>): Move to
+	vec-commond.md.
+	* config/arm/neon.md (vashl<mode>3): Delete.
+	* config/arm/vec-common.md (mve_vshlq_<supf><mode>): New.
+	(vasl<mode>3): New expander.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/98685
+	* tree-vect-slp.c (vect_schedule_slp_node): Refactor handling
+	of vector extern defs.
+
 2021-01-14  David Malcolm  <dmalcolm@redhat.com>
 
 	PR jit/98586
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 75c2a43..405a8dd 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210115
+20210116
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index b323a03..606af00 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,15 @@
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/98597
+	* c-pretty-print.c: Include options.h.
+	(c_fold_indirect_ref_for_warn): New function.
+	(print_mem_ref): Use it.  If it returns something that has compatible
+	type and is TBAA compatible with zero offset, print it and return,
+	otherwise print it using offsetof syntax or array ref syntax.  Fix up
+	printing if MEM_REFs first operand is ADDR_EXPR, or when the first
+	argument has pointer to array type.  Print pointers using the standard
+	formatting.
+
 2021-01-12  Martin Sebor  <msebor@redhat.com>
 
 	PR c/98597
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 8a98793..32989a1 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,9 @@
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	* c-typeck.c (c_finish_omp_clauses): For reduction build array with
+	unqualified element type and then call c_build_qualified_type on the
+	ARRAY_TYPE.
+
 2021-01-07  Richard Biener  <rguenther@suse.de>
 
 	* gimple-parser.c (c_parser_gimple_compound_statement): Only
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 7eb6773..b683c58 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,38 @@
+2021-01-15  Nathan Sidwell  <nathan@acm.org>
+
+	PR c++/98538
+	* tree.c (cp_build_qualified_type_real): Propagate an array's
+	dependentness to the copy, if known.
+
+2021-01-15  Jason Merrill  <jason@redhat.com>
+
+	PR c++/98642
+	* call.c (unsafe_return_slot_p): Return int.
+	(init_by_return_slot_p): Split out from...
+	(unsafe_copy_elision_p): ...here.
+	(unsafe_copy_elision_p_opt): New name for old meaning.
+	(build_over_call): Adjust.
+	(make_safe_copy_elision): New.
+	* typeck2.c (split_nonconstant_init_1): Elide copy from safe
+	list-initialization.
+	* cp-tree.h: Adjust.
+
+2021-01-15  Jason Merrill  <jason@redhat.com>
+
+	* call.c (base_ctor_for, make_base_init_ok): New.
+	(build_over_call): Use make_base_init_ok.
+
+2021-01-15  Jason Merrill  <jason@redhat.com>
+
+	PR c++/63707
+	* tree.c (build_vec_init_expr): Don't call build_vec_init_elt
+	if we got a CONSTRUCTOR.
+
+2021-01-15  Nathan Sidwell  <nathan@acm.org>
+
+	PR c++/98591
+	* lang-specs.h: Fix handling of -fmodule-only with -fsyntax-only.
+
 2021-01-14  Jason Merrill  <jason@redhat.com>
 
 	* typeck2.c (process_init_constructor_record): Use fldtype
diff --git a/gcc/go/ChangeLog b/gcc/go/ChangeLog
index ddf550f..8a9e282 100644
--- a/gcc/go/ChangeLog
+++ b/gcc/go/ChangeLog
@@ -1,3 +1,7 @@
+2021-01-15  Ian Lance Taylor  <iant@golang.org>
+
+	* Make-lang.in (GO_OBJS): Add go/embed.o.
+
 2021-01-05  Jakub Jelinek  <jakub@redhat.com>
 
 	* lang.opt (fgo-embedcfg=): Add full stop at the end of description.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c27656e..972107f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,159 @@
+2021-01-15  Carl Love  <cel@us.ibm.com>
+
+	* gcc.target/powerpc/builtins-1-p10-runnable.c: New test file.
+
+2021-01-15  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	* gfortran.dg/iso_fortran_binding_uint8_array.f90: New test.
+	* gfortran.dg/iso_fortran_binding_uint8_array_driver.c: New test.
+
+2021-01-15  Nathan Sidwell  <nathan@acm.org>
+
+	PR c++/98538
+	* g++.dg/template/pr98538.C: New.
+
+2021-01-15  Nathan Sidwell  <nathan@acm.org>
+
+	PR preprocessor/95253
+	* g++.dg/modules/dep-1_a.C: Adjust expected output.
+	* g++.dg/modules/dep-1_b.C: Likewise.
+	* g++.dg/modules/dep-2.C: Likewise.
+
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/96669
+	* gcc.dg/tree-ssa/pr96669-1.c: New test.
+
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/96681
+	* gcc.dg/tree-ssa/pr96681.c: New test.
+
+2021-01-15  Jason Merrill  <jason@redhat.com>
+
+	PR c++/98642
+	* g++.dg/cpp1z/elide5.C: New test.
+
+2021-01-15  Jason Merrill  <jason@redhat.com>
+
+	* g++.dg/cpp1z/elide4.C: New test.
+
+2021-01-15  Jason Merrill  <jason@redhat.com>
+
+	PR c++/63707
+	* g++.dg/cpp0x/initlist-array13.C: New test.
+
+2021-01-15  Alexandre Oliva  <oliva@adacore.com>
+
+	* gcc.dg/analyzer/alloca-leak.c: Drop alloca.h, use builtin.
+	* gcc.dg/analyzer/data-model-1.c: Likewise.
+	* gcc.dg/analyzer/malloc-1.c: Likewise.
+	* gcc.dg/analyzer/malloc-paths-8.c: Likewise.
+
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/96671
+	* gcc.dg/tree-ssa/pr96671-1.c: New test.
+	* gcc.dg/tree-ssa/pr96671-2.c: New test.
+
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/98597
+	* gcc.dg/uninit-38.c: Expect a space in between type name and asterisk.
+	Expect for now a (char *) cast for VLAs.
+	* gcc.dg/uninit-40.c: New test.
+
+2021-01-15  Nathan Sidwell  <nathan@acm.org>
+
+	PR c++/98591
+	* g++.dg/modules/pr98591.H: New file.
+
+2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/88836
+	* gcc.target/aarch64/sve/acle/general/ldff1_8.c: New test.
+	* gcc.target/aarch64/sve/ptest_1.c: Likewise.
+
+2021-01-15  Marius Hillenbrand  <mhillen@linux.ibm.com>
+
+	* gcc.target/s390/s390.exp: Call lib atomic-dg.exp to link
+	libatomic into testcases in gcc.target/s390/md.
+	* gcc.target/s390/md/atomic_exchange-1.c: Remove no unnecessary
+	-latomic.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/71233
+	* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: Add tests for
+	vceqz_p64, vceqq_p64 and vceqzq_p64.
+	* gcc.target/arm/simd/vceqz_p64.c: New test.
+	* gcc.target/arm/simd/vceqzq_p64.c: New test.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	Revert:
+	2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/71233
+	* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: Add tests for
+	vceqz_p64, vceqq_p64 and vceqzq_p64.
+
+2021-01-15  Martin Liska  <mliska@suse.cz>
+
+	* lib/gcov.exp: Use 'env python3' for execution of pytests.
+	Check that pytest accepts all needed options first.
+	Improve formatting of PASS/FAIL lines.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR testsuite/96147
+	* gcc.dg/vect/bb-slp-32.c: Align p.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR testsuite/96147
+	* gcc.dg/vect/bb-slp-9.c: Scan for a vector load transform.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR testsuite/96147
+	* gcc.dg/vect/slp-45.c: Key scanning on
+	vect_hw_misalign.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR testsuite/96147
+	* gcc.dg/vect/slp-43.c: Remove ! vect_hw_misalign scan.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/71233
+	* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: Add tests for
+	vceqz_p64, vceqq_p64 and vceqzq_p64.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR testsuite/96098
+	* gcc.dg/vect/bb-slp-pr68892.c: Remove.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* gcc.target/arm/simd/mve-vshr.c: Add tests for vshr.
+
+2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* gcc.target/arm/simd/mve-vshl.c: Add tests for vshl.
+
+2021-01-15  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/98685
+	* gcc.dg/vect/bb-slp-pr98685.c: New testcase.
+
+2021-01-15  Tamar Christina  <tamar.christina@arm.com>
+
+	* gcc.dg/vect/complex/complex-mla-template.c: Fix sed.
+	* gcc.dg/vect/complex/complex-mls-template.c: Likewise.
+
 2021-01-14  David Malcolm  <dmalcolm@redhat.com>
 
 	* gcc.dg/plugin/diagnostic-test-show-locus-GCC_EXTRA_DIAGNOSTIC_OUTPUT-fixits-v1.c:
diff --git a/libatomic/ChangeLog b/libatomic/ChangeLog
index 8a165fc..a24ca8a 100644
--- a/libatomic/ChangeLog
+++ b/libatomic/ChangeLog
@@ -1,3 +1,12 @@
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/70454
+	* configure.tgt: For i?86 and x86_64 determine if -march=i486 needs to
+	be added through preprocessor check on
+	__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4.  Determine if try_ifunc is needed
+	based on preprocessor check on __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
+	or __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8.
+
 2021-01-05  Samuel Thibault  <samuel.thibault@ens-lyon.org>
 
 	* configure: Re-generate.
diff --git a/libcpp/ChangeLog b/libcpp/ChangeLog
index e78e9a6..4c5f1f9 100644
--- a/libcpp/ChangeLog
+++ b/libcpp/ChangeLog
@@ -1,3 +1,8 @@
+2021-01-15  Nathan Sidwell  <nathan@acm.org>
+
+	PR preprocessor/95253
+	* mkdeps.c (munge): Do not escape ':'.
+
 2020-12-14  Nathan Sidwell  <nathan@acm.org>
 
 	* include/cpplib.h (struct cpp_macro): Add imported_p field.
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index 77eafe0..d30c963 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,9 @@
+2021-01-15  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	* runtime/ISO_Fortran_binding.c (CFI_establish): Fixed signed
+	  char arrays. Signed char or uint8_t arrays would cause
+	  crashes unless an element size is specified.
+
 2021-01-05  Samuel Thibault  <samuel.thibault@ens-lyon.org>
 
 	* configure: Re-generate.
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 7de6311..0f86cc3 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,10 @@
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/70454
+	* configure.tgt: For i?86 and x86_64 determine if -march=i486 needs to
+	be added through preprocessor check on
+	__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4.
+
 2021-01-14  Thomas Schwinge  <thomas@codesourcery.com>
 
 	PR libgomp/65099
diff --git a/libitm/ChangeLog b/libitm/ChangeLog
index 67873c0..7b3dff0 100644
--- a/libitm/ChangeLog
+++ b/libitm/ChangeLog
@@ -1,3 +1,10 @@
+2021-01-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/70454
+	* configure.tgt: For i?86 and x86_64 determine if -march=i486 needs to
+	be added through preprocessor check on
+	__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4.
+
 2021-01-05  Samuel Thibault  <samuel.thibault@ens-lyon.org>
 
 	* configure: Re-generate.