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| author | Alexander Monakov <amonakov@ispras.ru> | 2015-05-25 21:07:26 +0300 |
|---|---|---|
| committer | Alexander Monakov <amonakov@gcc.gnu.org> | 2015-05-25 21:07:26 +0300 |
| commit | 2e24efd3f49524b05dfb198cd60205a7113b10a2 (patch) | |
| tree | 0562ac6af86e040be01967c0a2589b6c57c19832 | |
| parent | 979455ea0ebfeb68f143f1c369fa83c6d2101201 (diff) | |
| download | gcc-2e24efd3f49524b05dfb198cd60205a7113b10a2.zip gcc-2e24efd3f49524b05dfb198cd60205a7113b10a2.tar.gz gcc-2e24efd3f49524b05dfb198cd60205a7113b10a2.tar.bz2 | |
i386.h (enum reg_class): Move CLOBBERED_REGS prior to Q_REGS.
* config/i386/i386.h (enum reg_class): Move CLOBBERED_REGS prior to
Q_REGS. Expand comment.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
testsuite:
* gcc.target/i386/pr66232-1.c: Adjust scan pattern.
* gcc.target/i386/pr66232-3.c: Likewise.
From-SVN: r223650
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.h | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr66232-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr66232-3.c | 2 |
5 files changed, 20 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c30a643..a387c80 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-05-25 Alexander Monakov <amonakov@ispras.ru> + + * config/i386/i386.h (enum reg_class): Move CLOBBERED_REGS prior to + Q_REGS. Expand comment. + (REG_CLASS_NAMES): Ditto. + (REG_CLASS_CONTENTS): Ditto. + 2015-05-25 Uros Bizjak <ubizjak@gmail.com> PR target/66274 diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 40e8f83..34ef343 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1298,7 +1298,9 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); The classes must be numbered in nondecreasing order; that is, a larger-numbered class must never be contained completely - in a smaller-numbered class. + in a smaller-numbered class. This is why CLOBBERED_REGS class + is listed early, even though in 64-bit mode it contains more + registers than just %eax, %ecx, %edx. For any two classes, it is very desirable that there be another class that represents their union. @@ -1314,11 +1316,11 @@ enum reg_class NO_REGS, AREG, DREG, CREG, BREG, SIREG, DIREG, AD_REGS, /* %eax/%edx for DImode */ + CLOBBERED_REGS, /* call-clobbered integer registers */ Q_REGS, /* %eax %ebx %ecx %edx */ NON_Q_REGS, /* %esi %edi %ebp %esp */ INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ - CLOBBERED_REGS, /* call-clobbered integer registers */ GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 %r9 %r10 %r11 %r12 %r13 %r14 %r15 */ FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ @@ -1375,10 +1377,10 @@ enum reg_class "AREG", "DREG", "CREG", "BREG", \ "SIREG", "DIREG", \ "AD_REGS", \ + "CLOBBERED_REGS", \ "Q_REGS", "NON_Q_REGS", \ "INDEX_REGS", \ "LEGACY_REGS", \ - "CLOBBERED_REGS", \ "GENERAL_REGS", \ "FP_TOP_REG", "FP_SECOND_REG", \ "FLOAT_REGS", \ @@ -1414,11 +1416,11 @@ enum reg_class { 0x10, 0x0, 0x0 }, /* SIREG */ \ { 0x20, 0x0, 0x0 }, /* DIREG */ \ { 0x03, 0x0, 0x0 }, /* AD_REGS */ \ + { 0x07, 0x0, 0x0 }, /* CLOBBERED_REGS */ \ { 0x0f, 0x0, 0x0 }, /* Q_REGS */ \ { 0x1100f0, 0x1fe0, 0x0 }, /* NON_Q_REGS */ \ { 0x7f, 0x1fe0, 0x0 }, /* INDEX_REGS */ \ { 0x1100ff, 0x0, 0x0 }, /* LEGACY_REGS */ \ - { 0x07, 0x0, 0x0 }, /* CLOBBERED_REGS */ \ { 0x1100ff, 0x1fe0, 0x0 }, /* GENERAL_REGS */ \ { 0x100, 0x0, 0x0 }, /* FP_TOP_REG */ \ { 0x0200, 0x0, 0x0 }, /* FP_SECOND_REG */ \ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 91fd4c5..a6db2a7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-05-25 Alexander Monakov <amonakov@ispras.ru> + + * gcc.target/i386/pr66232-1.c: Adjust scan pattern. + * gcc.target/i386/pr66232-3.c: Likewise. + 2015-05-25 Uros Bizjak <ubizjak@gmail.com> PR target/66274 diff --git a/gcc/testsuite/gcc.target/i386/pr66232-1.c b/gcc/testsuite/gcc.target/i386/pr66232-1.c index ba4a5ef..5ea03de 100644 --- a/gcc/testsuite/gcc.target/i386/pr66232-1.c +++ b/gcc/testsuite/gcc.target/i386/pr66232-1.c @@ -10,4 +10,4 @@ foo (void) } /* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr66232-3.c b/gcc/testsuite/gcc.target/i386/pr66232-3.c index ee3176c..e6ba60f 100644 --- a/gcc/testsuite/gcc.target/i386/pr66232-3.c +++ b/gcc/testsuite/gcc.target/i386/pr66232-3.c @@ -10,4 +10,4 @@ foo (void) } /* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ |