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| author | liuhongt <hongtao.liu@intel.com> | 2023-12-08 11:19:52 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2023-12-11 09:12:13 +0800 |
| commit | 2c2df123de432356d28ee7e8a9627dc9e80a399d (patch) | |
| tree | 34b01c800b0c09e02eb7595c9607a5c9bc16d319 | |
| parent | ae226cb1ee17d61c416c9d4d8c5a142788b8afff (diff) | |
| download | gcc-2c2df123de432356d28ee7e8a9627dc9e80a399d.zip gcc-2c2df123de432356d28ee7e8a9627dc9e80a399d.tar.gz gcc-2c2df123de432356d28ee7e8a9627dc9e80a399d.tar.bz2 | |
Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP.
gcc/ChangeLog:
PR target/112904
* config/i386/mmx.md (*xop_pcmov_<mode>): New define_insn.
gcc/testsuite/ChangeLog:
* g++.target/i386/pr112904.C: New test.
| -rw-r--r-- | gcc/config/i386/mmx.md | 22 | ||||
| -rw-r--r-- | gcc/testsuite/g++.target/i386/pr112904.C | 27 |
2 files changed, 49 insertions, 0 deletions
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index a07a921..06d6c57 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -4137,6 +4137,17 @@ (set_attr "mode" "TI")]) (define_insn "*xop_pcmov_<mode>" + [(set (match_operand:V4F_64 0 "register_operand" "=x") + (if_then_else:V4F_64 + (match_operand:V4F_64 3 "register_operand" "x") + (match_operand:V4F_64 1 "register_operand" "x") + (match_operand:V4F_64 2 "register_operand" "x")))] + "TARGET_XOP && TARGET_MMX_WITH_SSE" + "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "type" "sse4arg") + (set_attr "mode" "TI")]) + +(define_insn "*xop_pcmov_<mode>" [(set (match_operand:VI_16_32 0 "register_operand" "=x") (if_then_else:VI_16_32 (match_operand:VI_16_32 3 "register_operand" "x") @@ -4147,6 +4158,17 @@ [(set_attr "type" "sse4arg") (set_attr "mode" "TI")]) +(define_insn "*xop_pcmov_<mode>" + [(set (match_operand:V2F_32 0 "register_operand" "=x") + (if_then_else:V2F_32 + (match_operand:V2F_32 3 "register_operand" "x") + (match_operand:V2F_32 1 "register_operand" "x") + (match_operand:V2F_32 2 "register_operand" "x")))] + "TARGET_XOP" + "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "type" "sse4arg") + (set_attr "mode" "TI")]) + ;; XOP permute instructions (define_insn "mmx_ppermv64" [(set (match_operand:V8QI 0 "register_operand" "=x") diff --git a/gcc/testsuite/g++.target/i386/pr112904.C b/gcc/testsuite/g++.target/i386/pr112904.C new file mode 100644 index 0000000..556be92 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr112904.C @@ -0,0 +1,27 @@ +typedef _Float16 v4hf __attribute__((vector_size(8))); +typedef short v4hi __attribute__((vector_size(8))); +typedef _Float16 v2hf __attribute__((vector_size(4))); +typedef short v2hi __attribute__((vector_size(4))); + +typedef __bf16 v4bf __attribute__((vector_size(8))); +typedef __bf16 v2bf __attribute__((vector_size(4))); + +v4hf foo(v4hf a, v4hf b, v4hi c) +{ + return c ? a : b; +} + +v2hf foo1(v2hf a, v2hf b, v2hi c) +{ + return c ? a : b; +} + +v4bf foo(v4bf a, v4bf b, v4hi c) +{ + return c ? a : b; +} + +v2bf foo1(v2bf a, v2bf b, v2hi c) +{ + return c ? a : b; +} |