rs6000: Support SSE4.1 "min" and "max" intrinsics

Function signatures and decorations match gcc/config/i386/smmintrin.h.

Also, copy tests for _mm_min_epi8, _mm_min_epu16, _mm_min_epi32,
_mm_min_epu32, _mm_max_epi8, _mm_max_epu16, _mm_max_epi32, _mm_max_epu32
from gcc/testsuite/gcc.target/i386.

sse4_1-pmaxsb.c and sse4_1-pminsb.c were modified from using
"char" types to "signed char" types, because the default is unsigned on
powerpc.

2021-10-11  Paul A. Clarke  <pc@us.ibm.com>

gcc
	* config/rs6000/smmintrin.h (_mm_min_epi8, _mm_min_epu16,
	_mm_min_epi32, _mm_min_epu32, _mm_max_epi8, _mm_max_epu16,
	_mm_max_epi32, _mm_max_epu32): New.

gcc/testsuite
	* gcc.target/powerpc/sse4_1-pmaxsb.c: Copy from gcc.target/i386.
	* gcc.target/powerpc/sse4_1-pmaxsd.c: Same.
	* gcc.target/powerpc/sse4_1-pmaxud.c: Same.
	* gcc.target/powerpc/sse4_1-pmaxuw.c: Same.
	* gcc.target/powerpc/sse4_1-pminsb.c: Same.
	* gcc.target/powerpc/sse4_1-pminsd.c: Same.
	* gcc.target/powerpc/sse4_1-pminud.c: Same.
	* gcc.target/powerpc/sse4_1-pminuw.c: Same.

9 files changed, 428 insertions, 0 deletions

diff --git a/gcc/config/rs6000/smmintrin.h b/gcc/config/rs6000/smmintrin.h
index 3767a67e..af78207 100644
--- a/gcc/config/rs6000/smmintrin.h
+++ b/gcc/config/rs6000/smmintrin.h
@@ -296,6 +296,62 @@ _mm_floor_ss (__m128 __A, __m128 __B)
   return __r;
 }
 
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epi8 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_min ((__v16qi)__X, (__v16qi)__Y);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epu16 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_min ((__v8hu)__X, (__v8hu)__Y);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epi32 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_min ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_min_epu32 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_min ((__v4su)__X, (__v4su)__Y);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epi8 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_max ((__v16qi)__X, (__v16qi)__Y);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epu16 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_max ((__v8hu)__X, (__v8hu)__Y);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epi32 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_max ((__v4si)__X, (__v4si)__Y);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_max_epu32 (__m128i __X, __m128i __Y)
+{
+  return (__m128i) vec_max ((__v4su)__X, (__v4su)__Y);
+}
+
 /* Return horizontal packed word minimum and its index in bits [15:0]
    and bits [18:16] respectively.  */
 __inline __m128i
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxsb.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxsb.c
new file mode 100644
index 0000000..33f168b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxsb.c
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 1024
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 16];
+      signed char i[NUM];
+    } dst, src1, src2;
+  int i, sign = 1;
+  signed char max;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i * sign;
+      src2.i[i] = (i + 20) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < NUM; i += 16)
+    dst.x[i / 16] = _mm_max_epi8 (src1.x[i / 16], src2.x[i / 16]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      max = src1.i[i] <= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (max != dst.i[i])
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxsd.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxsd.c
new file mode 100644
index 0000000..60b3425
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxsd.c
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 64
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 4];
+      int i[NUM];
+    } dst, src1, src2;
+  int i, sign = 1;
+  int max;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i * sign;
+      src2.i[i] = (i + 20) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < NUM; i += 4)
+    dst.x[i / 4] = _mm_max_epi32 (src1.x[i / 4], src2.x[i / 4]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      max = src1.i[i] <= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (max != dst.i[i])
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxud.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxud.c
new file mode 100644
index 0000000..a6e9ffa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxud.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 64
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 4];
+      unsigned int i[NUM];
+    } dst, src1, src2;
+  int i;
+  unsigned int max;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i;
+      src2.i[i] = i + 20;
+      if ((i % 4))
+	src2.i[i] |= 0x80000000;
+    }
+
+  for (i = 0; i < NUM; i += 4)
+    dst.x[i / 4] = _mm_max_epu32 (src1.x[i / 4], src2.x[i / 4]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      max = src1.i[i] <= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (max != dst.i[i])
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxuw.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxuw.c
new file mode 100644
index 0000000..826db1e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pmaxuw.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 64
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 8];
+      unsigned short i[NUM];
+    } dst, src1, src2;
+  int i;
+  unsigned short max;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i;
+      src2.i[i] = i + 20;
+      if ((i % 8))
+	src2.i[i] |= 0x8000;
+    }
+
+  for (i = 0; i < NUM; i += 8)
+    dst.x[i / 8] = _mm_max_epu16 (src1.x[i / 8], src2.x[i / 8]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      max = src1.i[i] <= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (max != dst.i[i])
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pminsb.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminsb.c
new file mode 100644
index 0000000..74a3958
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminsb.c
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 1024
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 16];
+      signed char i[NUM];
+    } dst, src1, src2;
+  int i, sign = 1;
+  signed char min;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i * sign;
+      src2.i[i] = (i + 20) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < NUM; i += 16)
+    dst.x[i / 16] = _mm_min_epi8 (src1.x[i / 16], src2.x[i / 16]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      min = src1.i[i] >= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (min != dst.i[i])
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pminsd.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminsd.c
new file mode 100644
index 0000000..36aab22
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminsd.c
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 64
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 4];
+      int i[NUM];
+    } dst, src1, src2;
+  int i, sign = 1;
+  int min;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i * sign;
+      src2.i[i] = (i + 20) * sign;
+      sign = -sign;
+    }
+
+  for (i = 0; i < NUM; i += 4)
+    dst.x[i / 4] = _mm_min_epi32 (src1.x[i / 4], src2.x[i / 4]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      min = src1.i[i] >= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (min != dst.i[i])
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pminud.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminud.c
new file mode 100644
index 0000000..972e151
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminud.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 64
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 4];
+      unsigned int i[NUM];
+    } dst, src1, src2;
+  int i;
+  unsigned int min;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i;
+      src2.i[i] = i + 20;
+      if ((i % 4))
+	src2.i[i] |= 0x80000000;
+    }
+
+  for (i = 0; i < NUM; i += 4)
+    dst.x[i / 4] = _mm_min_epu32 (src1.x[i / 4], src2.x[i / 4]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      min = src1.i[i] >= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (min != dst.i[i])
+	abort ();
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-pminuw.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminuw.c
new file mode 100644
index 0000000..4fe7d3aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-pminuw.c
@@ -0,0 +1,47 @@
+/* { dg-do run } */
+/* { dg-require-effective-target powerpc_vsx_hw } */
+/* { dg-options "-O2 -mvsx" } */
+
+#ifndef CHECK_H
+#define CHECK_H "sse4_1-check.h"
+#endif
+
+#ifndef TEST
+#define TEST sse4_1_test
+#endif
+
+#include CHECK_H
+
+#include <smmintrin.h>
+
+#define NUM 64
+
+static void
+TEST (void)
+{
+  union
+    {
+      __m128i x[NUM / 8];
+      unsigned short i[NUM];
+    } dst, src1, src2;
+  int i;
+  unsigned short min;
+
+  for (i = 0; i < NUM; i++)
+    {
+      src1.i[i] = i * i;
+      src2.i[i] = i + 20;
+      if ((i % 8))
+	src2.i[i] |= 0x8000;
+    }
+
+  for (i = 0; i < NUM; i += 8)
+    dst.x[i / 8] = _mm_min_epu16 (src1.x[i / 8], src2.x[i / 8]);
+
+  for (i = 0; i < NUM; i++)
+    {
+      min = src1.i[i] >= src2.i[i] ? src2.i[i] : src1.i[i];
+      if (min != dst.i[i])
+	abort ();
+    }
+}