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| author | Richard Sandiford <richard.sandiford@arm.com> | 2025-08-14 13:36:40 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2025-08-14 13:36:40 +0100 |
| commit | 2934d4eea725fe9b560c5e51b859927c357ab6f7 (patch) | |
| tree | 94b1514da146eb41af0ea260129b03ae4ecf3055 | |
| parent | 5eccc9f4db9a96571dddfa089caad61f2833e63f (diff) | |
| download | gcc-2934d4eea725fe9b560c5e51b859927c357ab6f7.zip gcc-2934d4eea725fe9b560c5e51b859927c357ab6f7.tar.gz gcc-2934d4eea725fe9b560c5e51b859927c357ab6f7.tar.bz2 | |
powerpc: Add missing modes to P9 if_then_elses [PR121501]
These patterns had one (if_then_else ...) nested within another.
The outer if_then_else had SImode, which means that the "then"
and "else" should also be SImode (unless they're const_ints).
However, the inner if_then_else was modeless, which led to an
assertion failure when trying to take a subreg of it.
gcc/
PR target/121501
* config/rs6000/rs6000.md (cmprb, setb_signed, setb_unsigned)
(cmprb2, cmpeqb): Add missing modes to nested if_then_elses.
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index e31ee40..04a6c0f 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -15665,10 +15665,10 @@ (if_then_else:SI (lt (match_dup 3) (const_int 0)) (const_int -1) - (if_then_else (gt (match_dup 3) - (const_int 0)) - (const_int 1) - (const_int 0))))] + (if_then_else:SI (gt (match_dup 3) + (const_int 0)) + (const_int 1) + (const_int 0))))] "TARGET_P9_MISC" { operands[3] = gen_reg_rtx (CCmode); @@ -15703,10 +15703,10 @@ (if_then_else:SI (lt (match_operand:CC 1 "cc_reg_operand" "y") (const_int 0)) (const_int -1) - (if_then_else (gt (match_dup 1) - (const_int 0)) - (const_int 1) - (const_int 0))))] + (if_then_else:SI (gt (match_dup 1) + (const_int 0)) + (const_int 1) + (const_int 0))))] "TARGET_P9_MISC" "setb %0,%1" [(set_attr "type" "logical")]) @@ -15716,10 +15716,10 @@ (if_then_else:SI (ltu (match_operand:CCUNS 1 "cc_reg_operand" "y") (const_int 0)) (const_int -1) - (if_then_else (gtu (match_dup 1) - (const_int 0)) - (const_int 1) - (const_int 0))))] + (if_then_else:SI (gtu (match_dup 1) + (const_int 0)) + (const_int 1) + (const_int 0))))] "TARGET_P9_MISC" "setb %0,%1" [(set_attr "type" "logical")]) @@ -15751,10 +15751,10 @@ (if_then_else:SI (lt (match_dup 3) (const_int 0)) (const_int -1) - (if_then_else (gt (match_dup 3) - (const_int 0)) - (const_int 1) - (const_int 0))))] + (if_then_else:SI (gt (match_dup 3) + (const_int 0)) + (const_int 1) + (const_int 0))))] "TARGET_P9_MISC" { operands[3] = gen_reg_rtx (CCmode); @@ -15807,10 +15807,10 @@ (if_then_else:SI (lt (match_dup 3) (const_int 0)) (const_int -1) - (if_then_else (gt (match_dup 3) - (const_int 0)) - (const_int 1) - (const_int 0))))] + (if_then_else:SI (gt (match_dup 3) + (const_int 0)) + (const_int 1) + (const_int 0))))] "TARGET_P9_MISC && TARGET_64BIT" { operands[3] = gen_reg_rtx (CCmode); |