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author | GCC Administrator <gccadmin@gcc.gnu.org> | 2025-08-13 00:19:57 +0000 |
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committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2025-08-13 00:19:57 +0000 |
commit | 28c0d45201a0a4a0f7dd285b1992039cd6af015f (patch) | |
tree | ec0220dfc071077b9729f428f0b08bd30e3faba6 | |
parent | 44536104696e5d665a5b598144582acb8a110002 (diff) | |
download | gcc-28c0d45201a0a4a0f7dd285b1992039cd6af015f.zip gcc-28c0d45201a0a4a0f7dd285b1992039cd6af015f.tar.gz gcc-28c0d45201a0a4a0f7dd285b1992039cd6af015f.tar.bz2 |
Daily bump.
-rw-r--r-- | gcc/ChangeLog | 95 | ||||
-rw-r--r-- | gcc/DATESTAMP | 2 | ||||
-rw-r--r-- | gcc/cobol/ChangeLog | 9 | ||||
-rw-r--r-- | gcc/fortran/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 65 | ||||
-rw-r--r-- | libgcobol/ChangeLog | 27 |
6 files changed, 205 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ba9fe92..6e11426 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,98 @@ +2025-08-12 Pan Li <pan2.li@intel.com> + + * config/riscv/autovec-opt.md (*merge_vx_<mode>): Add new + pattern to combine the vmerge.vxm. + +2025-08-12 Robin Dapp <rdapp.gcc@gmail.com> + + PR target/121334 + * config/riscv/riscv-v.cc (expand_slide1up): New function. + (expand_vector_init_trailing_same_elem): Use new function. + (expand_const_vector_onestep): New function. + (expand_const_vector): Uew expand_slide1up. + (expand_vector_init_merge_repeating_sequence): Ditto. + (shuffle_off_by_one_patterns): Ditto. + +2025-08-12 mengqinggang <mengqinggang@loongson.cn> + + * config/loongarch/loongarch-def.h (ABI_BASE_LP64D): New macro. + (ABI_BASE_LP64F): New macro. + (ABI_BASE_LP64S): New macro. + (N_ABI_BASE_TYPES): New macro. + +2025-08-12 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.cc (vect_analyze_loop_2): Change + slp_done_for_suggested_uf to a boolean + single_lane_slp_done_for_suggested_uf. Change slp + to force_single_lane boolean. + (vect_analyze_loop_1): Adjust similarly. + +2025-08-12 Richard Sandiford <richard.sandiford@arm.com> + + PR rtl-optimization/121253 + * fwprop.cc (forward_propagate_into): Don't propagate asm defs. + +2025-08-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121509 + * tree-vect-stmts.cc (vect_mark_stmts_to_be_vectorized): + Fail early when we detect a relevant but not handled PHI. + +2025-08-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121514 + * tree-ssa-sccvn.cc (visit_nary_op): Only call + vn_nary_op_insert_stmt for SSA name result. + +2025-08-12 Andrew Pinski <andrew.pinski@oss.qualcomm.com> + + PR tree-optimization/121494 + * tree-ssa-forwprop.cc (optimize_agr_copyprop): Mark the bb of the use + stmt if needed for eh cleanup. + +2025-08-12 Richard Biener <rguenther@suse.de> + + * tree-vect-stmts.cc (vect_analyze_stmt): Only set + STMT_VINFO_VECTYPE for dataref SLP representatives. + Clear it for others and do not restore the original value. + (vect_transform_stmt): Likewise. + +2025-08-12 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.cc (get_initial_defs_for_reduction): + Get vector type as argument. + (vect_find_reusable_accumulator): Likewise. + (vect_transform_cycle_phi): Adjust. + +2025-08-12 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.cc (vectorizable_reduction): Replace + STMT_VINFO_VECTYPE use with SLP_TREE_VECTYPE. + +2025-08-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121493 + * tree-ssa-sccvn.cc (vn_reference_lookup_3): Opportunistically + strip components with known offset. + +2025-08-12 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.cc (vn_reference_lookup_3): When we fail to + match up the two base MEM_REFs, fail. + +2025-08-12 Shreya Munnangi <smunnangi1@ventanamicro.com> + Jeff Law <jlaw@ventanamicro.com> + Philipp Tomsich <philipp.tomsich@vrull.eu> + + * config/riscv/riscv-protos.h (synthesize_add): Add prototype. + * config/riscv/riscv.cc (synthesize_add): New function. + * config/riscv/riscv.md (addsi3): Allow any constant as operands[2] + in the expander. Force the constant into a register as needed for + TARGET_64BIT. Use synthesize_add for !TARGET_64BIT. + (*adddi3): Renamed from adddi3. + (adddi3): New expander. Use synthesize_add. + 2025-08-11 Richard Henderson <richard.henderson@linaro.org> * config/aarch64/aarch64.md (mov<ALLI>cc): Accept MODE_CC diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index e1a074b..a3fdc45 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20250812 +20250813 diff --git a/gcc/cobol/ChangeLog b/gcc/cobol/ChangeLog index 8c47213..f84cbbe 100644 --- a/gcc/cobol/ChangeLog +++ b/gcc/cobol/ChangeLog @@ -1,3 +1,12 @@ +2025-08-12 Robert Dubner <rdubner@symas.com> + + * genapi.cc (compare_binary_binary): Formatting. + (cobol_compare): Formatting. + (mh_numeric_display): Rewrite "move ND to ND" algorithm. + (initial_from_initial): Proper initialization of EBCDIC ND variables. + * genmath.cc (fast_add): Delete comment. + * genutil.cc (get_binary_value): Modify for updated EBCDIC. + 2025-08-07 Robert Dubner <rdubner@symas.com> * cbldiag.h (location_dump): Source code formatting. diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index e3e069e..18548f0 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,11 @@ +2025-08-12 Yuao Ma <c8ef@outlook.com> + + * check.cc (gfc_check_c_f_pointer): Check lower arg legitimacy. + * intrinsic.cc (add_subroutines): Teach c_f_pointer about lower arg. + * intrinsic.h (gfc_check_c_f_pointer): Add lower arg. + * intrinsic.texi: Update lower arg for c_f_pointer. + * trans-intrinsic.cc (conv_isocbinding_subroutine): Add logic handle lower. + 2025-08-11 Paul Thomas <pault@gcc.gnu.org> PR fortran/121398 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 50dcf2f..690071d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,68 @@ +2025-08-12 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test + helper macros. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test + data for run test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i8.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i8.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i8.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i8.c: New test. + +2025-08-12 Robin Dapp <rdapp.gcc@gmail.com> + + PR target/121334 + * gcc.target/riscv/rvv/autovec/pr121334.c: New test. + +2025-08-12 Richard Sandiford <richard.sandiford@arm.com> + + PR rtl-optimization/121253 + * gcc.target/aarch64/pr121253.c: New test. + +2025-08-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121509 + * gcc.dg/vect/pr121509.c: New testcase. + +2025-08-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121514 + * gcc.dg/torture/pr121514.c: New testcase. + +2025-08-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121493 + * gcc.dg/tree-ssa/ssa-fre-109.c: New testcase. + +2025-08-12 Yuao Ma <c8ef@outlook.com> + + * gfortran.dg/c_f_pointer_shape_tests_7.f90: New test. + * gfortran.dg/c_f_pointer_shape_tests_8.f90: New test. + * gfortran.dg/c_f_pointer_shape_tests_9.f90: New test. + +2025-08-12 Shreya Munnangi <smunnangi1@ventanamicro.com> + Jeff Law <jlaw@ventanamicro.com> + Philipp Tomsich <philipp.tomsich@vrull.eu> + + * gcc.target/riscv/add-synthesis-1.c: New test. + +2025-08-12 Robert Dubner <rdubner@symas.com> + + * cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out: + Change test for updated handling of Numeric Display variables. + 2025-08-11 Richard Henderson <richard.henderson@linaro.org> * gcc.target/aarch64/cmpbr-3.c: New. diff --git a/libgcobol/ChangeLog b/libgcobol/ChangeLog index 078757d..9f1bee8 100644 --- a/libgcobol/ChangeLog +++ b/libgcobol/ChangeLog @@ -1,3 +1,30 @@ +2025-08-12 Robert Dubner <rdubner@symas.com> + + * common-defs.h (NUMERIC_DISPLAY_SIGN_BIT): New comment; new constant. + (EBCDIC_MINUS): New constant. + (EBCDIC_PLUS): Likewise. + (EBCDIC_ZERO): Likewise. + (EBCDIC_NINE): Likewise. + (PACKED_NYBBLE_PLUS): Likewise. + (PACKED_NYBBLE_MINUS): Likewise. + (PACKED_NYBBLE_UNSIGNED): Likewise. + (NUMERIC_DISPLAY_SIGN_BIT_ASCII): Likewise. + (NUMERIC_DISPLAY_SIGN_BIT_EBCDIC): Likewise. + (SEPARATE_PLUS): Likewise. + (SEPARATE_MINUS): Likewise. + (ZONED_ZERO): Likewise. + (ZONE_SIGNED_EBCDIC): Likewise. + * configure: Regenerate. + * libgcobol.cc (turn_sign_bit_on): Handle new EBCDIC sign convention. + (turn_sign_bit_off): Likewise. + (is_sign_bit_on): Likewise. + (int128_to_field): EBCDIC NumericDisplay conversion. + (get_binary_value_local): Likewise. + (format_for_display_internal): Likewise. + (normalize_id): Likewise. + (__gg__inspect_format_1): Convert EBCDIC negative numbers to positive. + * stringbin.cc (packed_from_combined): Quell cppcheck warning. + 2025-08-10 H.J. Lu <hjl.tools@gmail.com> * configure: Regenerated. |