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authorRichard Sandiford <richard.sandiford@linaro.org>2011-07-11 12:11:33 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2011-07-11 12:11:33 +0000
commit28164eedaf926e36382ca5c8949e1756f2d4200f (patch)
tree83d2810d6f312e95977f7500df9f9abc47c713b7
parentf305422365c1f70e00ae6f5d9bc8bc8cad4928ed (diff)
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expr.c (expand_expr_real_1): Use expand_insn for movmisalign.
gcc/ * expr.c (expand_expr_real_1): Use expand_insn for movmisalign. From-SVN: r176150
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/expr.c39
2 files changed, 22 insertions, 21 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0dadeef..e10d69d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2011-07-11 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * expr.c (expand_expr_real_1): Use expand_insn for movmisalign.
+
2011-07-11 Arthur Loiret <aloiret@debian.org>
* config.gcc (s390-*-linux*): If 'enabled_targets' is 'all', build
diff --git a/gcc/expr.c b/gcc/expr.c
index fb4379f..77039e8 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -8692,7 +8692,8 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
{
addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
struct mem_address addr;
- int icode, align;
+ enum insn_code icode;
+ int align;
get_address_description (exp, &addr);
op0 = addr_for_mem_ref (&addr, as, true);
@@ -8709,18 +8710,15 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
&& ((icode = optab_handler (movmisalign_optab, mode))
!= CODE_FOR_nothing))
{
- rtx reg, insn;
+ struct expand_operand ops[2];
/* We've already validated the memory, and we're creating a
- new pseudo destination. The predicates really can't fail. */
- reg = gen_reg_rtx (mode);
-
- /* Nor can the insn generator. */
- insn = GEN_FCN (icode) (reg, temp);
- gcc_assert (insn != NULL_RTX);
- emit_insn (insn);
-
- return reg;
+ new pseudo destination. The predicates really can't fail,
+ nor can the generator. */
+ create_output_operand (&ops[0], NULL_RTX, mode);
+ create_fixed_operand (&ops[1], temp);
+ expand_insn (icode, 2, ops);
+ return ops[0].value;
}
return temp;
}
@@ -8732,7 +8730,8 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
enum machine_mode address_mode;
tree base = TREE_OPERAND (exp, 0);
gimple def_stmt;
- int icode, align;
+ enum insn_code icode;
+ int align;
/* Handle expansion of non-aliased memory with non-BLKmode. That
might end up in a register. */
if (TREE_CODE (base) == ADDR_EXPR)
@@ -8806,17 +8805,15 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
&& ((icode = optab_handler (movmisalign_optab, mode))
!= CODE_FOR_nothing))
{
- rtx reg, insn;
+ struct expand_operand ops[2];
/* We've already validated the memory, and we're creating a
- new pseudo destination. The predicates really can't fail. */
- reg = gen_reg_rtx (mode);
-
- /* Nor can the insn generator. */
- insn = GEN_FCN (icode) (reg, temp);
- emit_insn (insn);
-
- return reg;
+ new pseudo destination. The predicates really can't fail,
+ nor can the generator. */
+ create_output_operand (&ops[0], NULL_RTX, mode);
+ create_fixed_operand (&ops[1], temp);
+ expand_insn (icode, 2, ops);
+ return ops[0].value;
}
return temp;
}