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author | Patrick O'Neill <patrick@rivosinc.com> | 2023-10-04 15:50:55 -0700 |
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committer | Patrick O'Neill <patrick@rivosinc.com> | 2023-10-05 15:23:31 -0700 |
commit | 250dce25b6ca7ce63f036fc4a90b4d1e8c6517e9 (patch) | |
tree | 6eb255b3453cc903d7d137405834cb868725cde7 | |
parent | 0ee3266b3dec4d984d43c79e2b3e649256e3eaaa (diff) | |
download | gcc-250dce25b6ca7ce63f036fc4a90b4d1e8c6517e9.zip gcc-250dce25b6ca7ce63f036fc4a90b4d1e8c6517e9.tar.gz gcc-250dce25b6ca7ce63f036fc4a90b4d1e8c6517e9.tar.bz2 |
RISC-V: Test memcpy inlined on riscv_v
Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to
perform a memcpy. We no longer expect memcpy for riscv_v targets.
gcc/testsuite/ChangeLog:
* gcc.dg/pr90263.c: Skip riscv_v targets.
* gcc.target/riscv/rvv/base/pr90263.c: New test.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Co-authored-by: Joern Rennecke <joern.rennecke@embecosm.com>
-rw-r--r-- | gcc/testsuite/gcc.dg/pr90263.c | 1 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.dg/pr90263.c b/gcc/testsuite/gcc.dg/pr90263.c index 3222a53..831e098 100644 --- a/gcc/testsuite/gcc.dg/pr90263.c +++ b/gcc/testsuite/gcc.dg/pr90263.c @@ -2,6 +2,7 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ /* { dg-require-effective-target glibc } */ +/* { dg-skip-if "riscv_v uses an inline memcpy routine" { riscv_v } }*/ int *f (int *p, int *q, long n) { diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c new file mode 100644 index 0000000..7308428 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target glibc } */ + +#include "../../../../gcc.dg/pr90263.c" + +/* { dg-final { scan-assembler-not "memcpy" { target { riscv_v } } } } */ |