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| author | Haochen Gui <guihaoc@gcc.gnu.org> | 2022-01-17 11:24:20 +0800 |
|---|---|---|
| committer | Haochen Gui <guihaoc@gcc.gnu.org> | 2022-01-17 13:27:16 +0800 |
| commit | 240dd6c063b481c092c9ec406b69b400f6f033f1 (patch) | |
| tree | bb3d31b9135207c738a77a046540b4dd5ba8051e | |
| parent | 1e942d7c05c66ccc477567506a6bf86d91cae429 (diff) | |
| download | gcc-240dd6c063b481c092c9ec406b69b400f6f033f1.zip gcc-240dd6c063b481c092c9ec406b69b400f6f033f1.tar.gz gcc-240dd6c063b481c092c9ec406b69b400f6f033f1.tar.bz2 | |
rs6000: Split pattern for TI to V1TI move [PR103124]
This patch defines a new split pattern for TI to V1TI move. The pattern concatenates two subreg:DI of a TI to a V2DI. With the pattern, the subreg pass can do register split for TI when there is a TI to V1TI move.
gcc/
PR target/103124
* config/rs6000/vsx.md (split pattern for TI to V1TI move): Defined.
gcc/testsuite/
PR target/103124
* gcc.target/powerpc/pr103124.c: New testcase.
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 16 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr103124.c | 12 |
2 files changed, 28 insertions, 0 deletions
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 7bcf48f..65bbc76 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -6586,3 +6586,19 @@ [(set_attr "type" "vecperm") (set_attr "prefixed" "yes")]) +;; Construct V1TI by vsx_concat_v2di +(define_split + [(set (match_operand:V1TI 0 "vsx_register_operand") + (subreg:V1TI + (match_operand:TI 1 "int_reg_operand") 0 ))] + "TARGET_P9_VECTOR && !reload_completed" + [(const_int 0)] +{ + rtx tmp1 = simplify_gen_subreg (DImode, operands[1], TImode, 0); + rtx tmp2 = simplify_gen_subreg (DImode, operands[1], TImode, 8); + rtx tmp3 = gen_reg_rtx (V2DImode); + emit_insn (gen_vsx_concat_v2di (tmp3, tmp1, tmp2)); + rtx tmp4 = simplify_gen_subreg (V1TImode, tmp3, V2DImode, 0); + emit_move_insn (operands[0], tmp4); + DONE; +}) diff --git a/gcc/testsuite/gcc.target/powerpc/pr103124.c b/gcc/testsuite/gcc.target/powerpc/pr103124.c new file mode 100644 index 0000000..dc7bb9c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr103124.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ +/* { dg-final { scan-assembler-not {\mmr\M} } } */ + +vector __int128 add (long long a) +{ + vector __int128 b; + b = (vector __int128) {a}; + return b; +} |