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authorNick Clifton <nickc@cygnus.com>2000-05-16 23:53:19 +0000
committerNick Clifton <nickc@gcc.gnu.org>2000-05-16 23:53:19 +0000
commit23568fa021aa71b8bab49c2b9fc0ed58f30b033d (patch)
tree1450f3a982004ca04dfa33e76c4f996afd912200
parenteaef69ce27a08681af09e8a8b36bb110fe1e8568 (diff)
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Replace (GET_RTX_CLASS(GET_CODE()) == 'i') with INSN_P()
From-SVN: r33949
-rw-r--r--gcc/ChangeLog11
-rw-r--r--gcc/config/m32r/m32r.c52
2 files changed, 34 insertions, 29 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e8f6271..5efee53 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2000-05-16 Nick Clifton <nickc@cygnus.com>
+
+ * config/m32r/m32r.c (small_insn_p): Use INSN_P() to replace
+ GET_RTX_CLASS (GET_CODE ()) == 'i'.
+ (large_insn_p): Ditto.
+ (m32r_is_insn): New function: Return true if the insn contains
+ an executable instruction.
+ (m32r_adjust_insn): Use m32r_is_insn.
+ (m32r_sched_reorder): Use m32r_is_insn.
+ (m32r_sched_variable_issue): Use m32r_is_insn.
+
2000-05-16 Franz Sirl <Franz.Sirl-kernel@lauterbach.com>
* rs6000/rs6000.c (rs6000_select_section): Treat CONSTRUCTOR like
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index ee0ac4c..5229101 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -961,7 +961,7 @@ small_insn_p (op, mode)
if (GET_CODE (op) == CONST_INT && INTVAL (op) == 0)
return 1;
- if (GET_RTX_CLASS (GET_CODE (op)) != 'i')
+ if (! INSN_P (op))
return 0;
return get_attr_length (op) == 2;
@@ -974,7 +974,7 @@ large_insn_p (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
- if (GET_RTX_CLASS (GET_CODE (op)) != 'i')
+ if (! INSN_P (op))
return 0;
return get_attr_length (op) != 2;
@@ -1484,27 +1484,29 @@ m32r_adjust_cost (insn, link, dep_insn, cost)
}
-/* A C statement (sans semicolon) to update the integer scheduling
- priority `INSN_PRIORITY(INSN)'. Reduce the priority to execute
- the INSN earlier, increase the priority to execute INSN later.
- Do not define this macro if you do not need to adjust the
- scheduling priorities of insns.
+/* Return true if INSN is real instruction bearing insn. */
- On the m32r, increase the priority of long instructions so that
- the short instructions are scheduled ahead of the long ones. */
+static int
+m32r_is_insn (insn)
+ rtx insn;
+{
+ return (INSN_P (insn)
+ && GET_CODE (PATTERN (insn)) != USE
+ && GET_CODE (PATTERN (insn)) != CLOBBER
+ && GET_CODE (PATTERN (insn)) != ADDR_VEC);
+}
+
+/* Increase the priority of long instructions so that the
+ short instructions are scheduled ahead of the long ones. */
int
m32r_adjust_priority (insn, priority)
rtx insn;
int priority;
{
- if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
- {
- enum rtx_code code = GET_CODE (PATTERN (insn));
- if (code != USE && code != CLOBBER && code != ADDR_VEC
- && get_attr_insn_size (insn) != INSN_SIZE_SHORT)
- priority <<= 3;
- }
+ if (m32r_is_insn (insn)
+ && get_attr_insn_size (insn) != INSN_SIZE_SHORT)
+ priority <<= 3;
return priority;
}
@@ -1560,11 +1562,9 @@ m32r_sched_reorder (stream, verbose, ready, n_ready)
rtx insn = ready[i];
enum rtx_code code;
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
- || (code = GET_CODE (PATTERN (insn))) == USE
- || code == CLOBBER || code == ADDR_VEC)
+ if (! m32r_is_insn (insn))
{
- /* Dump all current short/long insns just in case */
+ /* Dump all current short/long insns just in case. */
while (long_head != long_tail)
*new_tail-- = *long_head++;
@@ -1619,9 +1619,8 @@ m32r_sched_reorder (stream, verbose, ready, n_ready)
enum rtx_code code;
fprintf (stream, " %d", INSN_UID (ready[i]));
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
- || (code = GET_CODE (PATTERN (insn))) == USE
- || code == CLOBBER || code == ADDR_VEC)
+
+ if (! m32r_is_insn (insn))
fputs ("(?)", stream);
else if (get_attr_insn_size (insn) != INSN_SIZE_SHORT)
@@ -1654,12 +1653,7 @@ m32r_sched_variable_issue (stream, verbose, insn, how_many)
how_many--;
if (how_many > 0 && !TARGET_DEBUG)
{
- if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
- how_many++;
-
- else if (GET_CODE (PATTERN (insn)) == USE
- || GET_CODE (PATTERN (insn)) == CLOBBER
- || GET_CODE (PATTERN (insn)) == ADDR_VEC)
+ if (! m32r_is_insn (insn))
how_many++;
else if (get_attr_insn_size (insn) != INSN_SIZE_SHORT)