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| author | Segher Boessenkool <segher@kernel.crashing.org> | 2019-01-18 19:01:56 +0100 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2019-01-18 19:01:56 +0100 |
| commit | 225220d668dafb8262db7012bced688acbe63b33 (patch) | |
| tree | c1ff1a80a7770c16c2227e30060fc5720fc23755 | |
| parent | 8b248c17bd9999eb3adb585b0789595bada43e8c (diff) | |
| download | gcc-225220d668dafb8262db7012bced688acbe63b33.zip gcc-225220d668dafb8262db7012bced688acbe63b33.tar.gz gcc-225220d668dafb8262db7012bced688acbe63b33.tar.bz2 | |
rs6000: Fix *movsi_from_df (PR88892)
The memory store instructions (stfs[u][x], stxssp[x]) can result in
garbage if the value to be stored isn't already a valid single
precision floating point number. So we cannot use this here.
PR target/88892
* config/rs6000/rs6000.md (*movsi_from_df): Allow only register
operands.
From-SVN: r268083
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 23 |
2 files changed, 15 insertions, 14 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1389077..6559a27 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-01-18 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/88892 + * config/rs6000/rs6000.md (*movsi_from_df): Allow only register + operands. + 2019-01-18 Richard Biener <rguenther@suse.de> PR tree-optimization/88903 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 56364e0..344cfa7 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7014,24 +7014,19 @@ 8, 4")]) ;; Like movsi_from_sf, but combine a convert from DFmode to SFmode before -;; moving it to SImode. We can do a SFmode store without having to do the -;; conversion explicitly. If we are doing a register->register conversion, use -;; XSCVDPSP instead of XSCVDPSPN, since the former handles cases where the -;; input will not fit in a SFmode, and the later assumes the value has already -;; been rounded. +;; moving it to SImode. We cannot do a SFmode store without having to do the +;; conversion explicitly since that doesn't work in most cases if the input +;; isn't representable as SF. Use XSCVDPSP instead of XSCVDPSPN, since the +;; former handles cases where the input will not fit in a SFmode, and the +;; latter assumes the value has already been rounded. (define_insn "*movsi_from_df" - [(set (match_operand:SI 0 "nonimmediate_operand" "=wa,m,wY,Z") + [(set (match_operand:SI 0 "gpc_reg_operand" "=wa") (unspec:SI [(float_truncate:SF - (match_operand:DF 1 "gpc_reg_operand" "wa, f,wb,wa"))] + (match_operand:DF 1 "gpc_reg_operand" "wa"))] UNSPEC_SI_FROM_SF))] - "TARGET_NO_SF_SUBREG" - "@ - xscvdpsp %x0,%x1 - stfs%U0%X0 %1,%0 - stxssp %1,%0 - stxsspx %x1,%y0" - [(set_attr "type" "fp,fpstore,fpstore,fpstore")]) + "xscvdpsp %x0,%x1" + [(set_attr "type" "fp")]) ;; Split a load of a large constant into the appropriate two-insn ;; sequence. |