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| author | liuhongt <hongtao.liu@intel.com> | 2024-10-08 16:18:31 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2024-10-17 10:05:02 +0800 |
| commit | 21e2cd65add9070292313f8e12e8731d0aa2c869 (patch) | |
| tree | baa97b3329554c1c4f4102749cb4d5f3fc3cb0ef | |
| parent | edf4db8355dead3413bad64f6a89bae82dabd0ad (diff) | |
| download | gcc-21e2cd65add9070292313f8e12e8731d0aa2c869.zip gcc-21e2cd65add9070292313f8e12e8731d0aa2c869.tar.gz gcc-21e2cd65add9070292313f8e12e8731d0aa2c869.tar.bz2 | |
Don't lower vpcmpu to pcmpgt since the latter is for signed comparison.
r15-1737-gb06a108f0fbffe lower AVX512 kmask comparison to AVX2 ones,
but wrong lowered unsigned comparison to signed ones, for unsigned
comparison, only EQ/NEQ can be lowered.
The commit fix that.
gcc/ChangeLog:
PR target/116940
* config/i386/sse.md (*avx2_pcmp<mode>3_7): Change
UNSPEC_PCMP_ITER to UNSPEC_PCMP.
(*avx2_pcmp<mode>3_8): New pre_reload
define_insn_and_splitter.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr116940.c: New test.
| -rw-r--r-- | gcc/config/i386/sse.md | 27 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr116940.c | 28 |
2 files changed, 54 insertions, 1 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index d8a05e2..59b826c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -18144,7 +18144,7 @@ [(match_operand:VI_128_256 3 "nonimmediate_operand") (match_operand:VI_128_256 4 "nonimmediate_operand") (match_operand:SI 5 "const_0_to_7_operand")] - UNSPEC_PCMP_ITER)))] + UNSPEC_PCMP)))] "TARGET_AVX512VL && ix86_pre_reload_split () /* NE is commutative. */ && (INTVAL (operands[5]) == 4 @@ -18167,6 +18167,31 @@ DONE; }) +(define_insn_and_split "*avx2_pcmp<mode>3_8" + [(set (match_operand:VI_128_256 0 "register_operand") + (vec_merge:VI_128_256 + (match_operand:VI_128_256 1 "const0_operand") + (match_operand:VI_128_256 2 "vector_all_ones_operand") + (unspec:<avx512fmaskmode> + [(match_operand:VI_128_256 3 "nonimmediate_operand") + (match_operand:VI_128_256 4 "nonimmediate_operand") + (match_operand:SI 5 "const_0_to_7_operand")] + UNSPEC_UNSIGNED_PCMP)))] + "TARGET_AVX512VL && ix86_pre_reload_split () + /* NE is commutative. */ + && INTVAL (operands[5]) == 4" + + "#" + "&& 1" + [(const_int 0)] +{ + if (MEM_P (operands[3])) + operands[3] = force_reg (<MODE>mode, operands[3]); + emit_move_insn (operands[0], gen_rtx_fmt_ee (EQ, <MODE>mode, + operands[3], operands[4])); + DONE; +}) + (define_expand "<avx512>_eq<mode>3<mask_scalar_merge_name>" [(set (match_operand:<avx512fmaskmode> 0 "register_operand") (unspec:<avx512fmaskmode> diff --git a/gcc/testsuite/gcc.target/i386/pr116940.c b/gcc/testsuite/gcc.target/i386/pr116940.c new file mode 100644 index 0000000..721596b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr116940.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512VL +#include "avx512f-helper.h" + +typedef __attribute__((__vector_size__ (16))) unsigned V; + +short s; + +V +foo () +{ + return ~(-(V){ 0, 0, 0, 1 } <= s); +} + +void +test_128 () +{ + V x = foo (); + if (x[0] != 0 || x[1] != 0 || x[2] != 0 || x[3] != 0xffffffff) + __builtin_abort(); +} + +void +test_256 () +{} |