diff options
| author | Pan Li <pan2.li@intel.com> | 2024-08-05 16:01:11 +0800 |
|---|---|---|
| committer | xuli <xuli1@eswincomputing.com> | 2024-08-07 01:11:58 +0000 |
| commit | 1b5c57e53e7ee4087e10f51fcf74968d950d3d83 (patch) | |
| tree | b6434cb8c6ee897f8fba1a1bc905ceba904276d3 | |
| parent | 596d1ed9d40b1081fcc6c6161a0135952829b88f (diff) | |
| download | gcc-1b5c57e53e7ee4087e10f51fcf74968d950d3d83.zip gcc-1b5c57e53e7ee4087e10f51fcf74968d950d3d83.tar.gz gcc-1b5c57e53e7ee4087e10f51fcf74968d950d3d83.tar.bz2 | |
RISC-V: Update .SAT_TRUNC dump check due to middle-end change
Due to recent middle-end change, update the .SAT_TRUNC expand dump
check from 2 to 4.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c: Adjust
asm check times from 2 to 4.
Signed-off-by: Pan Li <pan2.li@intel.com>
Signed-off-by: Pan Li <pan2.li@intel.com>
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c index 7f047f3..ae3e44c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c @@ -16,4 +16,4 @@ */ DEF_VEC_SAT_U_TRUNC_FMT_1 (uint8_t, uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */ |