Daily bump.

7 files changed, 342 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 51ba10b..ba9fe92 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,143 @@
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.md (mov<ALLI>cc): Accept MODE_CC
+	conditions directly; reject QI/HImode conditions.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	PR target/121388
+	* config/aarch64/aarch64.cc (aarch64_cb_rhs): Restrict the
+	range of LT/GE and GT/LE to their intersections.
+	* config/aarch64/aarch64.md (*aarch64_cb<INT_CMP><GPI>): Unexport.
+	Use cmpbr_imm_predicate instead of aarch64_cb_rhs.
+	* config/aarch64/constraints.md (Uc1): Accept 0..62.
+	(Uc2): Remove.
+	* config/aarch64/iterators.md (cmpbr_imm_predicate): New.
+	(cmpbr_imm_constraint): Update to match aarch64_cb_rhs.
+	* config/aarch64/predicates.md (aarch64_cb_reg_i63_operand): New.
+	(aarch64_cb_reg_i62_operand): New.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.cc (aarch64_if_then_else_costs):
+	Use aarch64_cb_rhs to match CB insns.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	PR target/121385
+	* config/aarch64/aarch64.md (*aarch64_tbz<LTGE><ALLI>1): Remove
+	cc clobber and expansion via TST+Bcond.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.h (TARGET_CMPBR): False when
+	aarch64_track_speculation is true.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.cc (aarch64_gen_compare_split_imm24): New.
+	* config/aarch64/aarch64-protos.h: Update.
+	* config/aarch64/aarch64.md (*aarch64_bcond_wide_imm<GPI>): Use it.
+	Add match_scratch and cc clobbers.  Use match_operator instead of
+	iterator expansion.
+	(*compare_cstore<GPI>_insn): Likewise.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/predicates.md (aarch64_split_imm24): Rename from
+	aarch64_imm24; exclude aarch64_move_imm and aarch64_uimm12_shift.
+	* config/aarch64/aarch64.md (*aarch64_bcond_wide_imm<GPI>):
+	Update for aarch64_split_imm24.
+	(*compare_cstore<GPI>_insn): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_if_then_else_costs): Likewise.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.md (tbranch_<EQL><SHORT>3): Remove.
+	(save_stack_nonlocal): Use aarch64_gen_compare_zero_and_branch.
+	(restore_stack_nonlocal): Likewise.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.cc
+	(aarch64_gen_compare_zero_and_branch): Export.
+	* config/aarch64/aarch64-protos.h
+	(aarch64_gen_compare_zero_and_branch): Declare it.
+	* config/aarch64/aarch64-sme.md (aarch64_restore_za): Use it.
+	* config/aarch64/aarch64.md (*aarch64_cbz<EQL><GPI>): Unexport.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.cc (aarch64_if_the_else_costs): Reorg to
+	include the cost of inner within TBZ sign-bit test, only match
+	CBZ/CBNZ with valid modes, and both for the aarch64_imm24 test.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.cc (aarch64_if_then_else_costs): Remove
+	else after return and re-indent.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* config/aarch64/aarch64.md (BRANCH_LEN_N_1KiB): Rename
+	from BRANCH_LEN_N_1Kib.
+
+2025-08-11  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	* tree-ssa-forwprop.cc (optimize_aggr_zeroprop): Recognize stores
+	of integer_zerop as memset of 0.
+
+2025-08-11  Jeff Law  <jlaw@ventanamicro.com>
+
+	* doc/sourcebuild.texi: Add riscv_b_ok and riscv_v_ok target selectors.
+
+2025-08-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121488
+	* tree-ssa-sccvn.cc (visit_nary_op): If the BIT_FIELD_REF
+	result is of wrong type, try a VIEW_CONVERT_EXPR around it.
+
+2025-08-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121362
+	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Swap index
+	guards on component stripping loops.
+
+2025-08-11  Pan Li  <pan2.li@intel.com>
+
+	* tree-ssa-math-opts.cc (match_saturation_mul): Add new func
+	to emit IFN_SAT_MUL if matched.
+	(math_opts_dom_walker::after_dom_children): Try to match
+	the phi node for SAT_MUL.
+
+2025-08-11  Pan Li  <pan2.li@intel.com>
+
+	* match.pd: Add form 2 for unsigned SAT_MUL.
+
+2025-08-11  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Remove.
+	(riscv_rtx_costs): Refactor to serach vec_duplicate on the
+	sub rtx.
+
+2025-08-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	PR target/121464
+	* config/arm/arm.md (arm_<mrrc>, arm_<mcrr>): Fix operand check.
+
+2025-08-11  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR rtl-optimization/121306
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Distribute
+	non-narrowing integer-to-integer subregs through logic ops,
+	in a similar way to the existing word_mode handling.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	* tree-cfg.cc (find_case_label_for_value): Fix comment typo,
+	singe-valued -> single-valued.
+	* config/arc/arc.md: Fix comment typos, unsinged -> unsigned.
+
 2025-08-10  Matthew Fortune  <matthew.fortune@imgtec.com>
 
 	* config/mips/mips.h (FRAME_GROWS_DOWNWARD) Allow the frame to
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 9aa9a6d..e1a074b 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250811
+20250812
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index b85f527..fecc7c2 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,28 @@
+2025-08-11  Nicolas Werner  <nicolas.werner@hotmail.de>
+
+	* mapper-client.cc (spawn_mapper_program): change argv parsing
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/117783
+	* decl.cc (set_sb_pack_name): For name independent decls
+	just clear DECL_NAME instead of appending #i to it.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/117783
+	* decl.cc (cp_finish_decomp): Don't sorry on tuple static
+	structured bindings with a pack, instead temporarily reset
+	DECL_NAME of the individual vars in the pack to the name
+	of the pack for cp_finish_decl time and force mangling.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/121442
+	* parser.cc (cp_parser_decomposition_declaration): Don't copy
+	DECL_DECLARED_CONST{EXPR,INIT}_P bits from decl to decl2 if
+	decl is error_mark_node.
+
 2025-08-08  David Malcolm  <dmalcolm@redhat.com>
 
 	* error.cc (cp_adjust_diagnostic_info): Convert "context" arg from
diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog
index 1217b5d..8b86cd6 100644
--- a/gcc/d/ChangeLog
+++ b/gcc/d/ChangeLog
@@ -1,3 +1,9 @@
+2025-08-11  Iain Sandoe  <iain@sandoe.co.uk>
+
+	* d-codegen.cc (build_filename_from_loc): Use
+	build_string_literal() to build a null-terminated string for
+	the filename.
+
 2025-08-06  Sam James  <sam@gentoo.org>
 
 	* Make-lang.in (ALL_DFLAGS): Don't use ALIASING_FLAGS.
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index c203356..e3e069e 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,19 @@
+2025-08-11  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/121398
+	* resolve.cc (check_pdt_args): New function.
+	(check_generic_tbp_ambiguity): Use it to ensure that args to
+	typebound procedures that do not have the same declared type as
+	the containing derived type have 'pass1/2' set to null. This
+	avoids false ambiguity errors.
+	(resolve_typebound_procedure): Do not generate a wrong type
+	error for typebound procedures marked as pass if they are of a
+	different declared type to the containing pdt_type.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	* gfortran.h (gfc_case): Fix comment typo, singe -> single.
+
 2025-08-09  Paul Thomas  <pault@gcc.gnu.org>
 
 	PR fortran/121182
diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog
index 487defa..6631db7 100644
--- a/gcc/po/ChangeLog
+++ b/gcc/po/ChangeLog
@@ -1,3 +1,9 @@
+2025-08-11  Joseph Myers  <josmyers@redhat.com>
+
+	* be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po,
+	ja.po, ka.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po,
+	zh_CN.po, zh_TW.po: Update.
+
 2025-06-12  Joseph Myers  <josmyers@redhat.com>
 
 	* es.po: Update.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 835d344..50dcf2f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,151 @@
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* gcc.target/aarch64/cmpbr-3.c: New.
+	* gcc.target/aarch64/ifcvt_multiple_sets_rewire.c: Simplify
+	test for csel by ignoring the actual registers used.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	PR target/121388
+	* gcc.target/aarch64/cmpbr.c (u32_x0_ult_64): XFAIL.
+	(i32_x0_slt_64, u64_x0_ult_64, i64_x0_slt_64): XFAIL.
+	* gcc.target/aarch64/cmpbr-2.c: New.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* gcc.target/aarch64/cmpbr.c: Only compile, not assemble,
+	since we want to scan the assembly.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	PR target/121385
+	* gcc.target/aarch64/cmpbr-1.c: New.
+
+2025-08-11  Richard Henderson  <richard.henderson@linaro.org>
+
+	* gcc.target/aarch64/gcs-nonlocal-3.c: Match cbnz.
+
+2025-08-11  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/121398
+	* gfortran.dg/pdt_generic_1.f90: New test.
+
+2025-08-11  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	* gcc.dg/torture/copy-prop-aggr-zero-1.c: New test.
+	* gcc.dg/torture/copy-prop-aggr-zero-2.c: New test.
+	* gcc.dg/tree-ssa/copy-prop-aggregate-zero-1.c: New test.
+	* gcc.dg/tree-ssa/copy-prop-aggregate-zero-2.c: New test.
+	* gcc.dg/tree-ssa/copy-prop-aggregate-zero-3.c: New test.
+
+2025-08-11  Jeff Law  <jlaw@ventanamicro.com>
+
+	* lib/target-supports.exp (check_effective_target_riscv_b_ok): New.
+	* gcc.target/riscv/pr116085.c: Use new target selector.
+	* gcc.target/riscv/pr117690.c: Use new target selector.
+	* gcc.target/riscv/pr120333.c: Use new target selector.
+	* gcc.target/riscv/zba-shNadd-10.c: Use new target selector.
+
+2025-08-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121488
+	* gcc.dg/tree-ssa/ssa-fre-108.c: New testcase.
+
+2025-08-11  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
+	* gcc.target/riscv/sat/sat_u_mul-3-u16.c: New test.
+	* gcc.target/riscv/sat/sat_u_mul-3-u32.c: New test.
+	* gcc.target/riscv/sat/sat_u_mul-3-u64.c: New test.
+	* gcc.target/riscv/sat/sat_u_mul-3-u8.c: New test.
+	* gcc.target/riscv/sat/sat_u_mul-run-3-u16.c: New test.
+	* gcc.target/riscv/sat/sat_u_mul-run-3-u32.c: New test.
+	* gcc.target/riscv/sat/sat_u_mul-run-3-u64.c: New test.
+	* gcc.target/riscv/sat/sat_u_mul-run-3-u8.c: New test.
+
+2025-08-11  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c: Update
+	asm check due to above change.
+	* gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv-nofm.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv-nofm.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv-nofm.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv-nofm.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv32gcv.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_copysign-rv64gcv.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fadd-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fadd-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fadd-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fadd-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-5.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fma_fnma-6.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-5.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fms_fnms-6.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmul-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmul-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmul-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmul-4.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/cond/cond_fmul-5.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto.
+
+2025-08-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	PR target/121464
+	* gcc.target/arm/acle/mcrr.c: Update testcase.
+	* gcc.target/arm/acle/mcrr2.c: Likewise.
+	* gcc.target/arm/acle/mrrc.c: Likewise.
+	* gcc.target/arm/acle/mrrc2.c: Likewise.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	* g++.dg/warn/template-1.C: Fix comment typo, unsinged -> unsigned.
+	* gcc.target/powerpc/builtins-2-p9-runnable.c (main): Likewise.
+	* gcc.dg/graphite/id-30.c: Likewise.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/117783
+	* g++.dg/cpp26/name-independent-decl11.C: New test.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/117783
+	* g++.dg/cpp26/decomp19.C: Don't expect sorry on tuple static
+	structured bindings with a pack.
+	* g++.dg/cpp26/decomp26.C: New test.
+
+2025-08-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/121442
+	* g++.dg/cpp1z/decomp65.C: New test.
+
 2025-08-10  H.J. Lu  <hjl.tools@gmail.com>
 
 	PR testsuite/121205