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| author | DJ Delorie <dj@redhat.com> | 2003-11-04 13:22:37 -0500 |
|---|---|---|
| committer | DJ Delorie <dj@gcc.gnu.org> | 2003-11-04 13:22:37 -0500 |
| commit | 15bb534e0a20a3b0ef1d4fa328a05baf8ef27460 (patch) | |
| tree | 3e06902999f4959350f141b265846baff33ff176 | |
| parent | 104da10b9b3850bc821a2c3b902001c7324ec6c5 (diff) | |
| download | gcc-15bb534e0a20a3b0ef1d4fa328a05baf8ef27460.zip gcc-15bb534e0a20a3b0ef1d4fa328a05baf8ef27460.tar.gz gcc-15bb534e0a20a3b0ef1d4fa328a05baf8ef27460.tar.bz2 | |
v850.md (mulhisi3): Expand the const_int case separately to avoid trying to sign extend the const.
* config/v850/v850.md (mulhisi3): Expand the const_int case
separately to avoid trying to sign extend the const.
From-SVN: r73256
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/v850/v850.md | 12 |
2 files changed, 12 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e26d5c3..cb0d1b5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2003-11-04 DJ Delorie <dj@redhat.com> + + * config/v850/v850.md (mulhisi3): Expand the const_int case + separately to avoid trying to sign extend the const. + 2003-11-04 Richard Sandiford <rsandifo@redhat.com> * emit-rtl.c (copy_rtx_if_shared): Don't allow MEMs with constant diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md index ba058a4..8e028ab 100644 --- a/gcc/config/v850/v850.md +++ b/gcc/config/v850/v850.md @@ -368,7 +368,11 @@ (sign_extend:SI (match_operand:HI 1 "register_operand" "")) (sign_extend:SI (match_operand:HI 2 "nonmemory_operand" ""))))] "" - "") + "if (GET_CODE (operands[2]) == CONST_INT) + { + emit_insn (gen_mulhisi3_internal2 (operands[0], operands[1], operands[2])); + DONE; + }") (define_insn "*mulhisi3_internal1" [(set (match_operand:SI 0 "register_operand" "=r") @@ -381,13 +385,11 @@ (set_attr "cc" "none_0hit") (set_attr "type" "mult")]) -;; ??? Sign extending constants isn't valid. Fix? - -(define_insn "*mulhisi3_internal2" +(define_insn "mulhisi3_internal2" [(set (match_operand:SI 0 "register_operand" "=r,r") (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "%0,r")) - (sign_extend:SI (match_operand 2 "const_int_operand" "J,K"))))] + (match_operand:HI 2 "const_int_operand" "J,K")))] "" "@ mulh %2,%0 |