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| author | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-01-25 20:15:14 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-01-30 15:50:15 +0100 |
| commit | 1472ba52f3f94a626b62a93a1dc44ca448555ef8 (patch) | |
| tree | 2840d1c4c52ff69f094fd5f7c3926cd6a96f1fc4 | |
| parent | 7c4d1b7a44009c7b89f3aff6e014c4a19563e82e (diff) | |
| download | gcc-1472ba52f3f94a626b62a93a1dc44ca448555ef8.zip gcc-1472ba52f3f94a626b62a93a1dc44ca448555ef8.tar.gz gcc-1472ba52f3f94a626b62a93a1dc44ca448555ef8.tar.bz2 | |
aarch64: Update Ampere-1A (-mcpu=ampere1a) to include SM4
gcc/ChangeLog:
* config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
ampere1a to include SM4.
| -rw-r--r-- | gcc/config/aarch64/aarch64-cores.def | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 2a0f52e..85fdfd8 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -70,7 +70,7 @@ AARCH64_CORE("thunderxt83", thunderxt83, thunderx, V8A, (CRC, CRYPTO), thu /* Ampere Computing ('\xC0') cores. */ AARCH64_CORE("ampere1", ampere1, cortexa57, V8_6A, (F16, RNG, AES, SHA3), ampere1, 0xC0, 0xac3, -1) -AARCH64_CORE("ampere1a", ampere1a, cortexa57, V8_6A, (F16, RNG, AES, SHA3, MEMTAG), ampere1a, 0xC0, 0xac4, -1) +AARCH64_CORE("ampere1a", ampere1a, cortexa57, V8_6A, (F16, RNG, AES, SHA3, SM4, MEMTAG), ampere1a, 0xC0, 0xac4, -1) /* Do not swap around "emag" and "xgene1", this order is required to handle variant correctly. */ AARCH64_CORE("emag", emag, xgene1, V8A, (CRC, CRYPTO), emag, 0x50, 0x000, 3) |