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author | Zhijin Zeng <zengzhijin@linux.spacemit.com> | 2025-04-28 09:24:16 +0800 |
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committer | Kito Cheng <kito.cheng@sifive.com> | 2025-04-29 21:24:56 +0800 |
commit | 102eccaf8e2f914d3afbf7acfcee19bc5b240eca (patch) | |
tree | 3b24c36e101e49c53d05aae1894d2255ae424895 | |
parent | aa93272cfd2233858da0792761387cc27f4d5ff3 (diff) | |
download | gcc-102eccaf8e2f914d3afbf7acfcee19bc5b240eca.zip gcc-102eccaf8e2f914d3afbf7acfcee19bc5b240eca.tar.gz gcc-102eccaf8e2f914d3afbf7acfcee19bc5b240eca.tar.bz2 |
RISC-V: Fix register move cost for SIBCALL_REGS/JALR_REGS
SIBCALL_REGS/JALR_REGS are also subset of GR_REGS and need to
be taken into acount in riscv_register_move_cost, otherwise it
will get a incorrect cost.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_register_move_cost): Use
reg_class_subset_p to check the reg class.
-rw-r--r-- | gcc/config/riscv/riscv.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index bad59e2..c53e0dd 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -9650,10 +9650,10 @@ int riscv_register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to) { - bool from_is_fpr = from == FP_REGS || from == RVC_FP_REGS; - bool from_is_gpr = from == GR_REGS || from == RVC_GR_REGS; - bool to_is_fpr = to == FP_REGS || to == RVC_FP_REGS; - bool to_is_gpr = to == GR_REGS || to == RVC_GR_REGS; + bool from_is_fpr = reg_class_subset_p (from, FP_REGS); + bool from_is_gpr = reg_class_subset_p (from, GR_REGS); + bool to_is_fpr = reg_class_subset_p (to, FP_REGS); + bool to_is_gpr = reg_class_subset_p (to, GR_REGS); if ((from_is_fpr && to_is_gpr) || (from_is_gpr && to_is_fpr)) return tune_param->fmv_cost; |