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| author | Olivier Hainque <hainque@act-europe.fr> | 2003-04-21 23:32:06 +0200 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 2003-04-21 17:32:06 -0400 |
| commit | 0d2f38ee4068f6d836a975f9e91663f72e17d93e (patch) | |
| tree | 28e1168b00fd20a7fceed802205b8b1947fdeec4 | |
| parent | d79f9ec9ffb6aa93e0bd6479ac12564eb27b46c1 (diff) | |
| download | gcc-0d2f38ee4068f6d836a975f9e91663f72e17d93e.zip gcc-0d2f38ee4068f6d836a975f9e91663f72e17d93e.tar.gz gcc-0d2f38ee4068f6d836a975f9e91663f72e17d93e.tar.bz2 | |
expmed.c (extract_bit_field): Reverse operands of && condition to prevent a potential division by zero in the...
* expmed.c (extract_bit_field): Reverse operands of && condition to
prevent a potential division by zero in the previously first branch.
* config/pa/pa.md (extv, extzv): FAIL if the bitfield length is zero.
From-SVN: r65907
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/pa/pa.md | 8 | ||||
| -rw-r--r-- | gcc/expmed.c | 38 |
3 files changed, 31 insertions, 19 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index decc4b1..ec107c8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -3,6 +3,10 @@ * calls.c (expand_call): Prevent sibcall optimization for calls to nested subprograms. + * expmed.c (extract_bit_field): Reverse operands of && condition to + prevent a potential division by zero in the previously first branch. + * config/pa/pa.md (extv, extzv): FAIL if the bitfield length is zero. + 2003-04-21 Joel Brobecker <brobecker@gnat.com> * dwarf2out.c (is_ada, is_ada_subrange_type): New functions. diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 523b971..1d69c20 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -7153,6 +7153,10 @@ "" " { + /* PA extraction insns don't support zero length bitfields. */ + if (INTVAL (operands[2]) == 0) + FAIL; + if (TARGET_64BIT) emit_insn (gen_extzv_64 (operands[0], operands[1], operands[2], operands[3])); @@ -7215,6 +7219,10 @@ "" " { + /* PA extraction insns don't support zero length bitfields. */ + if (INTVAL (operands[2]) == 0) + FAIL; + if (TARGET_64BIT) emit_insn (gen_extv_64 (operands[0], operands[1], operands[2], operands[3])); diff --git a/gcc/expmed.c b/gcc/expmed.c index b48576b..5cc0894 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -1104,25 +1104,25 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, ? mode : mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0)); - if (((GET_CODE (op0) != MEM - && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode), - GET_MODE_BITSIZE (GET_MODE (op0))) - && GET_MODE_SIZE (mode1) != 0 - && byte_offset % GET_MODE_SIZE (mode1) == 0) - || (GET_CODE (op0) == MEM - && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0)) - || (offset * BITS_PER_UNIT % bitsize == 0 - && MEM_ALIGN (op0) % bitsize == 0)))) - && ((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode) - && bitpos % BITS_PER_WORD == 0) - || (mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0) != BLKmode - /* ??? The big endian test here is wrong. This is correct - if the value is in a register, and if mode_for_size is not - the same mode as op0. This causes us to get unnecessarily - inefficient code from the Thumb port when -mbig-endian. */ - && (BYTES_BIG_ENDIAN - ? bitpos + bitsize == BITS_PER_WORD - : bitpos == 0)))) + if (((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode) + && bitpos % BITS_PER_WORD == 0) + || (mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0) != BLKmode + /* ??? The big endian test here is wrong. This is correct + if the value is in a register, and if mode_for_size is not + the same mode as op0. This causes us to get unnecessarily + inefficient code from the Thumb port when -mbig-endian. */ + && (BYTES_BIG_ENDIAN + ? bitpos + bitsize == BITS_PER_WORD + : bitpos == 0))) + && ((GET_CODE (op0) != MEM + && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode), + GET_MODE_BITSIZE (GET_MODE (op0))) + && GET_MODE_SIZE (mode1) != 0 + && byte_offset % GET_MODE_SIZE (mode1) == 0) + || (GET_CODE (op0) == MEM + && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (op0)) + || (offset * BITS_PER_UNIT % bitsize == 0 + && MEM_ALIGN (op0) % bitsize == 0))))) { if (mode1 != GET_MODE (op0)) { |