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authorKazu Hirata <kazu@cs.umass.edu>2003-06-15 04:00:48 +0000
committerKazu Hirata <kazu@gcc.gnu.org>2003-06-15 04:00:48 +0000
commit0b4be7de750a66978f2244f4f2b0d9f385af192e (patch)
tree54c1715cf0f53ebc910e880eaed5a6ff8cfaae4a
parentb2a67e419cf2a05ec160585e4d2945dd479de8df (diff)
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install.texi: Follow spelling conventions.
* doc/install.texi: Follow spelling conventions. * doc/tm.texi: Likewise. * config/fp-bit.c: Likewise. * config/arm/arm.c: Likewise. * config/frv/frv.c: Likewise. * config/ns32k/NOTES: Likewise. * config/ns32k/STATUS: Likewise. From-SVN: r67962
-rw-r--r--gcc/ChangeLog10
-rw-r--r--gcc/config/arm/arm.c2
-rw-r--r--gcc/config/fp-bit.c2
-rw-r--r--gcc/config/frv/frv.c4
-rw-r--r--gcc/config/ns32k/NOTES2
-rw-r--r--gcc/config/ns32k/STATUS4
-rw-r--r--gcc/doc/install.texi2
-rw-r--r--gcc/doc/tm.texi4
8 files changed, 20 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 15030b1..d38c768 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2003-06-14 Kazu Hirata <kazu@cs.umass.edu>
+
+ * doc/install.texi: Follow spelling conventions.
+ * doc/tm.texi: Likewise.
+ * config/fp-bit.c: Likewise.
+ * config/arm/arm.c: Likewise.
+ * config/frv/frv.c: Likewise.
+ * config/ns32k/NOTES: Likewise.
+ * config/ns32k/STATUS: Likewise.
+
2003-06-14 Roger Sayle <roger@eyesopen.com>
Zack Weinberg <zack@codesourcery.com>
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 23500fe..4a42f0b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2350,7 +2350,7 @@ arm_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
/* Addressing mode support functions. */
-/* Return non-zero if X is a legitimate immediate operand when compiling
+/* Return nonzero if X is a legitimate immediate operand when compiling
for PIC. */
int
legitimate_pic_operand_p (rtx x)
diff --git a/gcc/config/fp-bit.c b/gcc/config/fp-bit.c
index b8ac298..6640f7a 100644
--- a/gcc/config/fp-bit.c
+++ b/gcc/config/fp-bit.c
@@ -371,7 +371,7 @@ pack_d ( fp_number_type * src)
if (low >= ((halffractype)1 << HALFFRACBITS))
/* We don't shift left, since it has just become the
smallest normal number, whose implicit 1 bit is
- now indicated by the non-zero exponent. */
+ now indicated by the nonzero exponent. */
exp++;
}
}
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index c2a8ef9..e664087 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -2338,8 +2338,8 @@ frv_final_prescan_insn (insn, opvec, noperands)
Printable instructions will be asm_operands or match one of the .md
patterns. Since asm instructions cannot be packed -- and will
- therefore have TImode -- this loop terminates on any recognisable
- instruction, and on any unrecognisable instruction with TImode. */
+ therefore have TImode -- this loop terminates on any recognizable
+ instruction, and on any unrecognizable instruction with TImode. */
for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
{
if (NOTE_P (insn))
diff --git a/gcc/config/ns32k/NOTES b/gcc/config/ns32k/NOTES
index 4688246..824c80c 100644
--- a/gcc/config/ns32k/NOTES
+++ b/gcc/config/ns32k/NOTES
@@ -10,7 +10,7 @@ Ian Dall <ian@beware.dropbear.id.au>
------------------------------------
The ns32x81 fpu handles most operands in hardware, but traps on NaN,
-Inf and Denormalized numbers. The correct behaviour can be handled by
+Inf and Denormalized numbers. The correct behavior can be handled by
the trap handler. This is mostly transparent to the compiler, but in
the case of floating point comparisions, the trap handler and the
compiler must co-operate.
diff --git a/gcc/config/ns32k/STATUS b/gcc/config/ns32k/STATUS
index 2754bf1..5467255 100644
--- a/gcc/config/ns32k/STATUS
+++ b/gcc/config/ns32k/STATUS
@@ -28,7 +28,7 @@ correct if not ideal.
gcc.dg/debug/debug-1.c scan-assembler xyzzy:
At -O3 level of optimization, variable xyzzy gets eliminated. Isn't it
reasonable that the debugging info is gone too? Indeed, the
-documentation says this is expected behaviour.
+documentation says this is expected behavior.
gcc.dg/debug/debug-2.c scan-assembler xyzzy:
As for the above.
@@ -61,7 +61,7 @@ gcc.dg/uninit-A.c -O2 -Wall -S
Bogus warnings, almost certainly not backend.
gcc.dg/special/weak-1.c execution test
-X This fails for i386 too. I don't understand what the correct behaviour
+X This fails for i386 too. I don't understand what the correct behavior
for this test is.
gcc.dg/special/gcsec-1.c (test for excess errors)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 7c82d0b..546a968 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -2557,7 +2557,7 @@ OpenServer, you must have at least the first maintenance pack installed
the "Execution Environment Update", provides updated link editors and
assemblers, as well as updated standard C and math libraries. The C
startup modules are also updated to support the System V gABI draft, and
-GCC relies on that behaviour. OSS631 provides a collection of commonly
+GCC relies on that behavior. OSS631 provides a collection of commonly
used open source libraries, some of which GCC depends on (such as GNU
gettext and zlib). SCO OpenServer Release 5.0.7 has all of this built
in by default, but OSS631C and later also apply to that release. Please
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 24775b2..b837816 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -2840,9 +2840,9 @@ value @code{STARTING_FRAME_OFFSET}.
@findex STACK_ALIGNMENT_NEEDED
@item STACK_ALIGNMENT_NEEDED
Define to zero to disable final alignment of the stack during reload.
-The non-zero default for this macro is suitable for most ports.
+The nonzero default for this macro is suitable for most ports.
-On ports where @code{STARTING_FRAME_OFFSET} is non-zero or where there
+On ports where @code{STARTING_FRAME_OFFSET} is nonzero or where there
is a register save block following the local block that doesn't require
alignment to @code{STACK_BOUNDARY}, it may be beneficial to disable
stack alignment and do it in the backend.