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author | Uros Bizjak <ubizjak@gmail.com> | 2013-05-08 20:05:41 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2013-05-08 20:05:41 +0200 |
commit | 0b013847f8eb2bf2b6a32fc08f489110cf1353f8 (patch) | |
tree | 34121bc1e955fa5436ee2bc5460f8effbae5da85 | |
parent | 1dc3d6e9e10ae9260484c0e2009c360a7ab0cc19 (diff) | |
download | gcc-0b013847f8eb2bf2b6a32fc08f489110cf1353f8.zip gcc-0b013847f8eb2bf2b6a32fc08f489110cf1353f8.tar.gz gcc-0b013847f8eb2bf2b6a32fc08f489110cf1353f8.tar.bz2 |
mmx.md (*vec_extract* splitters): Simplify post-reload splitter preparation statements.
* config/i386/mmx.md (*vec_extract* splitters): Simplify post-reload
splitter preparation statements.
* config/i386/sse.md (*vec_extract* splitters): Ditto.
(*avx_vperm_broadcast_<mode>): Use adjust_address instead of
adjust_address_nv.
From-SVN: r198718
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/i386/mmx.md | 38 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 19 |
3 files changed, 26 insertions, 39 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 28a7262..b629517 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2013-05-08 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (*vec_extract* splitters): Simplify post-reload + splitter preparation statements. + * config/i386/sse.md (*vec_extract* splitters): Ditto. + (*avx_vperm_broadcast_<mode>): Use adjust_address instead of + adjust_address_nv. + 2013-05-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gimple-ssa-strength-reduction.c (count_candidates): Change diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 4911cb2..ebf7bcd 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -594,15 +594,12 @@ "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "#" "&& reload_completed" - [(const_int 0)] + [(set (match_dup 0) (match_dup 1))] { - rtx op1 = operands[1]; - if (REG_P (op1)) - op1 = gen_rtx_REG (SFmode, REGNO (op1)); + if (REG_P (operands[1])) + operands[1] = gen_rtx_REG (SFmode, REGNO (operands[1])); else - op1 = gen_lowpart (SFmode, op1); - emit_move_insn (operands[0], op1); - DONE; + operands[1] = adjust_address (operands[1], SFmode, 0); }) ;; Avoid combining registers from different units in a single alternative, @@ -629,12 +626,8 @@ (match_operand:V2SF 1 "memory_operand") (parallel [(const_int 1)])))] "TARGET_MMX && reload_completed" - [(const_int 0)] -{ - operands[1] = adjust_address (operands[1], SFmode, 4); - emit_move_insn (operands[0], operands[1]); - DONE; -}) + [(set (match_dup 0) (match_dup 1))] + "operands[1] = adjust_address (operands[1], SFmode, 4);") (define_expand "vec_extractv2sf" [(match_operand:SF 0 "register_operand") @@ -1289,15 +1282,12 @@ "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "#" "&& reload_completed" - [(const_int 0)] + [(set (match_dup 0) (match_dup 1))] { - rtx op1 = operands[1]; - if (REG_P (op1)) - op1 = gen_rtx_REG (SImode, REGNO (op1)); + if (REG_P (operands[1])) + operands[1] = gen_rtx_REG (SImode, REGNO (operands[1])); else - op1 = gen_lowpart (SImode, op1); - emit_move_insn (operands[0], op1); - DONE; + operands[1] = adjust_address (operands[1], SImode, 0); }) ;; Avoid combining registers from different units in a single alternative, @@ -1330,12 +1320,8 @@ (match_operand:V2SI 1 "memory_operand") (parallel [(const_int 1)])))] "TARGET_MMX && reload_completed" - [(const_int 0)] -{ - operands[1] = adjust_address (operands[1], SImode, 4); - emit_move_insn (operands[0], operands[1]); - DONE; -}) + [(set (match_dup 0) (match_dup 1))] + "operands[1] = adjust_address (operands[1], SImode, 4);") (define_expand "vec_extractv2si" [(match_operand:SI 0 "register_operand") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 5f1fb2c..9d77250 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4277,12 +4277,8 @@ (match_dup 0) (const_int 1)))] "TARGET_SSE && reload_completed" - [(const_int 0)] -{ - emit_move_insn (adjust_address (operands[0], <ssescalarmode>mode, 0), - operands[1]); - DONE; -}) + [(set (match_dup 0) (match_dup 1))] + "operands[0] = adjust_address (operands[0], <ssescalarmode>mode, 0);") (define_expand "vec_set<mode>" [(match_operand:V 0 "register_operand") @@ -4362,12 +4358,9 @@ "TARGET_SSE" "#" "&& reload_completed" - [(const_int 0)] + [(set (match_dup 0) (match_dup 1))] { - int i = INTVAL (operands[2]); - - emit_move_insn (operands[0], adjust_address (operands[1], SFmode, i*4)); - DONE; + operands[1] = adjust_address (operands[1], SFmode, INTVAL (operands[2]) * 4); }) (define_expand "avx_vextractf128<mode>" @@ -10654,8 +10647,8 @@ DONE; } - operands[1] = adjust_address_nv (op1, <ssescalarmode>mode, - elt * GET_MODE_SIZE (<ssescalarmode>mode)); + operands[1] = adjust_address (op1, <ssescalarmode>mode, + elt * GET_MODE_SIZE (<ssescalarmode>mode)); }) (define_expand "avx_vpermil<mode>" |