invoke.texi: Add AVR invocation docs.

        * invoke.texi: Add AVR invocation docs.
        * install.texi: Add information about AVR.
        * md.texi: Add AVR constraint letters description.
        * extend.texi: Add description for AVR specific attributes.

From-SVN: r32022

5 files changed, 131 insertions, 3 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 44a19e6..a843bcc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+Wed Feb 16 21:07:53 2000  Denis Chertykov  <denisc@overta.ru>
+
+	* invoke.texi: Add AVR invocation docs.
+	* install.texi: Add information about AVR.
+	* md.texi: Add AVR constraint letters description.
+	* extend.texi: Add description for AVR specific attributes.
+
 2000-02-16  Jason Merrill  <jason@casey.cygnus.com>
 
 	* fixinc/fixinc.svr4: Wrap byteorder.h with extern "C".
diff --git a/gcc/extend.texi b/gcc/extend.texi
index be217a3..87cf291 100644
--- a/gcc/extend.texi
+++ b/gcc/extend.texi
@@ -1682,6 +1682,25 @@ function is an interrupt handler.  The compiler will generate function
 entry and exit sequences suitable for use in an interrupt handler when this
 attribute is present.
 
+Interrupt handler functions on the AVR processors
+Use this option on the AVR to indicate that the specified
+function is an interrupt handler.  The compiler will generate function
+entry and exit sequences suitable for use in an interrupt handler when this
+attribute is present. Interrupts will be enabled inside function.
+
+@item signal
+@cindex signal handler functions on the AVR processors
+Use this option on the AVR to indicate that the specified
+function is an signal handler.  The compiler will generate function
+entry and exit sequences suitable for use in an signal handler when this
+attribute is present. Interrupts will be disabled inside function.
+
+@item naked
+@cindex function without a prologue/epilogue code on the AVR processors
+Use this option on the AVR to indicate that the specified
+function don't have a prologue/epilogue.  The compiler don't generate
+function entry and exit sequences.
+
 @item model (@var{model-name})
 @cindex function addressability on the M32R/D
 Use this attribute on the M32R/D to set the addressability of an object,
diff --git a/gcc/install.texi b/gcc/install.texi
index 545a1c6..9eb10aa 100644
--- a/gcc/install.texi
+++ b/gcc/install.texi
@@ -1,4 +1,4 @@
-@c Copyright (C) 1988, 89, 92-98, 1999 Free Software Foundation, Inc.
+@c Copyright (C) 1988, 89, 92-99, 2000 Free Software Foundation, Inc.
 @c This is part of the GCC manual.
 @c For copying conditions, see the file gcc.texi.
 
@@ -745,7 +745,7 @@ Here are the possible CPU types:
 
 @quotation
 @c gmicro, fx80, spur and tahoe omitted since they don't work.
-1750a, a29k, alpha, arm, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
+1750a, a29k, alpha, arm, avr, c@var{n}, clipper, dsp16xx, elxsi, fr30, h8300,
 hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860, i960, m32r,
 m68000, m68k, m88k, mcore, mips, mipsel, mips64, mips64el, mn10200, mn10300,
 ns32k, pdp11, powerpc, powerpcle, romp, rs6000, sh, sparc, sparclite,
@@ -977,6 +977,17 @@ particular configuration.
 @item a29k-*-bsd
 AMD Am29050 used in a system running a variant of BSD Unix.
 
+@item avr
+ATMEL AVR-family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+Supports following MCU's:
+ - AT90S23xx
+ - ATtiny22
+ - AT90S44xx
+ - AT90S85xx
+ - ATmega603/603L
+ - ATmega103/103L
+
 @item decstation-*
 MIPS-based DECstations can support three different personalities:
 Ultrix, DEC OSF/1, and OSF/rose.  (Alpha-based DECstation products have
diff --git a/gcc/invoke.texi b/gcc/invoke.texi
index 1df4b32..f3a483c 100644
--- a/gcc/invoke.texi
+++ b/gcc/invoke.texi
@@ -428,6 +428,10 @@ in the following sections.
 -msoft-float -mrtd -mnortd -mregparam -mnoregparam -msb -mnosb
 -mbitfield -mnobitfield -mhimem -mnohimem
 
+@emph{AVR Options}
+-mmcu=@var{mcu} -msize -minit-stack=@var{n} -mno-interrupts
+-mcall-prologues
+
 @emph{MCore Options}
 -mhardlit, -mno-hardlit -mdiv -mno-div -mrelax-immediates 
 -mno-relax-immediates -mwide-bitfields -mno-wide-bitfields
@@ -3765,8 +3769,9 @@ that macro, which enables you to change the defaults.
 * TMS320C3x/C4x Options::
 * V850 Options::
 * ARC Options::
-* MCore Options::
 * NS32K Options::
+* AVR Options::
+* MCore Options::
 @end menu
 
 @node M680x0 Options
@@ -6841,6 +6846,32 @@ This is the default for all platforms.
 
 @end table
 
+@node AVR Options
+@subsection AVR Options
+@cindex AVR Options
+
+These options are defined for AVR implementations:
+
+@table @code
+@item -mmcu=@var{mcu}
+Specify ATMEL AVR mcu (at90s23xx,attiny22,at90s44xx,at90s85xx,atmega603,
+atmega103).
+
+@item -msize
+Output instruction size's to the asm file
+
+@item -minit-stack=@var{N}
+Specify the initial stack address
+
+@item -mno-interrupts
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
+
+@item -mcall-prologues
+Functions prologues/epilogues expanded as call to appropriate
+subroutines. Code size will be smaller.
+@end table
+
 @node MCore Options
 @subsection MCore Options
 @cindex MCore options
diff --git a/gcc/md.texi b/gcc/md.texi
index faec112..8617ada 100644
--- a/gcc/md.texi
+++ b/gcc/md.texi
@@ -1336,6 +1336,66 @@ A floating point constant (in @code{asm} statements, use the machine
 independent @samp{E} or @samp{F} instead)
 @end table
 
+@item AVR family---@file{avr.h}
+@table @code
+@item l
+Registers from r0 to r15
+
+@item a
+Registers from r16 to r23
+
+@item d
+Registers from r16 to r31
+
+@item w
+Register from r24 to r31. This registers can be used in @samp{addw} command
+
+@item e
+Pointer register (r26 - r31)
+
+@item b
+Base pointer register (r28 - r31)
+
+@item t
+Temporary register r0
+
+@item x
+Register pair X (r27:r26)
+
+@item y
+Register pair Y (r29:r28)
+
+@item z
+Register pair Z (r31:r30)
+
+@item I
+Constant greater than -1, less than 64
+
+@item J
+Constant greater than -64, less than 1
+
+@item K
+Constant integer 2
+
+@item L
+Constant integer 0
+
+@item M
+Constant that fits in 8 bits
+
+@item N
+Constant integer -1
+
+@item O
+Constant integer 8
+
+@item P
+Constant integer 1
+
+@item G
+A floating point constant 0.0
+@end table
+
 @item IBM RS6000---@file{rs6000.h}
 @table @code
 @item b