aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRichard Earnshaw <rearnsha@arm.com>2022-06-17 14:25:51 +0100
committerRichard Earnshaw <rearnsha@arm.com>2022-06-17 14:27:01 +0100
commit040f8224617ad3924f606c8982da369f898693d1 (patch)
treee878e63450d684959f71d8f71aecdd79ae76351b
parent0f96ac43fa0a5fdbfce317b274233852d5b46d23 (diff)
downloadgcc-040f8224617ad3924f606c8982da369f898693d1.zip
gcc-040f8224617ad3924f606c8982da369f898693d1.tar.gz
gcc-040f8224617ad3924f606c8982da369f898693d1.tar.bz2
arm: fix checking ICE in arm_print_operand [PR106004]
Sigh, another instance where I incorrectly used XUINT instead of UINTVAL. I've also made the code here a little more robust (although I think this case can't in fact be reached) if the 32-bit clear mask includes bit 31. This case, if reached, would print out an out-of-range value based on the size of the compiler's HOST_WIDE_INT type due to sign-extension. We avoid this by masking the value after inversion. gcc/ChangeLog: PR target/106004 * config/arm/arm.cc (arm_print_operand, case 'V'): Use UINTVAL. Clear bits in the mask above bit 31.
-rw-r--r--gcc/config/arm/arm.cc3
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 2925907..33fb98d 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -24199,7 +24199,8 @@ arm_print_operand (FILE *stream, rtx x, int code)
return;
}
- unsigned HOST_WIDE_INT val = ~XUINT (x, 0);
+ unsigned HOST_WIDE_INT val
+ = ~UINTVAL (x) & HOST_WIDE_INT_UC (0xffffffff);
int lsb = exact_log2 (val & -val);
asm_fprintf (stream, "#%d, #%d", lsb,
(exact_log2 (val + (val & -val)) - lsb));