aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>2020-03-20 09:10:17 +0000
committerAndre Vieira <andre.simoesdiasvieira@arm.com>2020-03-20 09:12:44 +0000
commit005f6fc59e5fceb658e11f153402711ee7f12c1a (patch)
tree0ac4713bd01b734e4e0f91e806def4d57119ccc0
parent0efe7d8796e00a5737017fe472680b653bd83d90 (diff)
downloadgcc-005f6fc59e5fceb658e11f153402711ee7f12c1a.zip
gcc-005f6fc59e5fceb658e11f153402711ee7f12c1a.tar.gz
gcc-005f6fc59e5fceb658e11f153402711ee7f12c1a.tar.bz2
gcc, Arm: Fix testisms for MVE testsuite
This patch fixes some testism where -mfpu=auto was missing or where we could end up with -mfloat-abi=hard and soft on the same command-line. gcc/testsuite/ChangeLog: 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com> * gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c: Fix testisms. * gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_fpu3.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_libcall1.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_libcall2.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_float.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_float1.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_float2.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_int.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_int1.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_int2.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_uint.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_uint1.c: Likewise. * gcc.target/arm/mve/intrinsics/mve_vector_uint2.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c: Likewise.
-rw-r--r--gcc/testsuite/ChangeLog20
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c1
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c1
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float1.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float2.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int1.c11
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int2.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c5
18 files changed, 56 insertions, 20 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a039f96..8f8b088 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,25 @@
2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
+ * gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c: Fix testisms.
+ * gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_fpu3.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_libcall1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_libcall2.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_float.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_float1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_float2.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_int.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_int1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_int2.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_uint.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_uint1.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/mve_vector_uint2.c: Likewise.
+ * gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c: Likewise.
+
+2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
* gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c: New test.
2020-03-20 Jakub Jelinek <jakub@redhat.com>
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
index 17ba616..d552fbd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-additional-options "-march=armv8.1-m.main+mve.fp -mfloat-abi=hard -mthumb" } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve.fp -mfloat-abi=hard -mthumb -mfpu=auto" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
index 7b877c4..e40b82e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-additional-options "-march=armv8.1-m.main+mve.fp -mfloat-abi=softfp -mthumb" } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve.fp -mfloat-abi=softfp -mthumb -mfpu=auto" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c
index 85fbb57..e04cb61 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb" } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb -mfpu=auto" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c
index 23b3683..f52c362 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=softfp -mthumb" } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=softfp -mthumb -mfpu=auto" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c
index 8f7fa34..1f249ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fpu3.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=soft -mthumb" } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=soft -mthumb -mfpu=auto" } */
int
foo1 (int value)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c
index 7c38d31..03347d4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb -mfpu=auto" } */
float
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c
index 773c844..f6291b7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb -mfpu=auto" } */
double
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float.c
index ac51f7f..eac2c84 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve.fp -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float1.c
index d41900c..d531901 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float1.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve.fp -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float2.c
index f02dd8b..bf39fc6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float2.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_float2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve.fp -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int.c
index dfe08b9..3a63b59 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int1.c
index cb96eb8..e15b10b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int1.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
@@ -10,7 +11,7 @@ int32x4_t value3;
int64x2_t value4;
int8x16_t
-foo8 ()
+foo8 (void)
{
int8x16_t b = value1;
return b;
@@ -21,7 +22,7 @@ foo8 ()
/* { dg-final { scan-assembler "vldrb.8*" } } */
int16x8_t
-foo16 ()
+foo16 (void)
{
int16x8_t b = value2;
return b;
@@ -32,7 +33,7 @@ foo16 ()
/* { dg-final { scan-assembler "vldrb.8*" } } */
int32x4_t
-foo32 ()
+foo32 (void)
{
int32x4_t b = value3;
return b;
@@ -43,7 +44,7 @@ foo32 ()
/* { dg-final { scan-assembler "vldrb.8" } } */
int64x2_t
-foo64 ()
+foo64 (void)
{
int64x2_t b = value4;
return b;
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int2.c
index 32f589a..a7f66ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int2.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_int2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c
index 1957d38..6e2e768 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c
index 0561178..d6dba65 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint1.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c
index 8b4f4cb..7009197 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vector_uint2.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=soft" } {""} } */
+/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -mthumb" } */
#include "arm_mve.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
index 6c3eda5..2fe8c5f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c
@@ -1,6 +1,7 @@
/* { dg-do compile } */
-/* { dg-additional-options "-march=armv8.1-m.main+mve -mfloat-abi=hard -O2" } */
-/* { dg-skip-if "Skip if not auto" {*-*-*} {"-mfpu=*"} {"-mfpu=auto"} } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
#include "arm_mve.h"