aboutsummaryrefslogtreecommitdiff
path: root/sim/testsuite/frv/addicc.cgs
blob: 6f2a19760c47083c23ff743aa396bb70ed17c421 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
# frv testcase for addicc $GRi,$s10,$GRk,$ICCi_1
# mach: all

	.include "testutils.inc"

	start

	.global addicc
addicc:
	; Test add $u4Ri
	set_gr_immed   	4,gr8
	set_icc         0x0f,0		; Set mask opposite of expected
	addicc		gr8,0,gr8,icc0
	test_icc	0 0 0 0 icc0
	test_gr_immed  	4,gr8
	set_icc         0x0f,0		; Set mask opposite of expected
	addicc		gr8,1,gr8,icc0
	test_icc	0 0 0 0 icc0
	test_gr_immed  	5,gr8
	set_icc         0x0f,0		; Set mask opposite of expected
	addicc		gr8,15,gr8,icc0
	test_icc	0 0 0 0 icc0
	test_gr_immed  	20,gr8
	set_gr_limmed  	0x7fff,0xffff,gr8	; test neg and overflow bits
	set_icc         0x05,0		; Set mask opposite of expected
	addicc		gr8,1,gr8,icc0
	test_icc	1 0 1 0 icc0
	test_gr_limmed 	0x8000,0x0000,gr8

	pass