blob: 26eff8c650a21507e7e30b35dd96a28dcd6dacdc (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
|
#source: imply.s
#as: -misa-spec=20191213
#objdump: --syms --special-syms
.*file format.*riscv.*
SYMBOL TABLE:
[0-9a-f]+ l d .text 0+000 .text
[0-9a-f]+ l d .data 0+000 .data
[0-9a-f]+ l d .bss 0+000 .bss
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0_zmmul1p0_zaamo1p0_zalrsc1p0
[0-9a-f]+ l .text 0+000 \$xrv32e1p9
[0-9a-f]+ l .text 0+000 \$xrv32i2p1
[0-9a-f]+ l .text 0+000 \$xrv32i2p0_zicsr2p0_zifencei2p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicntr2p0_zicsr2p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zihpm2p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_m2p0_zmmul1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zaamo1p0_zabha1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zaamo1p0_zacas1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_a2p1_zaamo1p0_zalrsc1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl32b1p0_xsfvcp1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zfhmin1p0_zve32f1p0_zve32x1p0_zvfh1p0_zvfhmin1p0_zvl32b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfhmin1p0_zvl32b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zfbfmin1p0_zfhmin1p0_zve32f1p0_zve32x1p0_zvfbfwma1p0_zvl32b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvl32b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_d2p2_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zve64f1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvl32b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl32b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl65536b1p0_zvl8192b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32768b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl1024b1p0_zvl128b1p0_zvl16384b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0_zvl8192b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl4096b1p0_zvl512b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl1024b1p0_zvl128b1p0_zvl2048b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl1024b1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl512b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl128b1p0_zvl256b1p0_zvl32b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl32b1p0_zvl64b1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zca1p0_zcb1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_d2p2_zicsr2p0_zca1p0_zcd1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zca1p0_zcf1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zca1p0_zcmp1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zca1p0_zcmop1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_h1p0_zicsr2p0_shcounterenw1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_h1p0_zicsr2p0_shgatpa1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_h1p0_zicsr2p0_shtvala1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_h1p0_zicsr2p0_shvsatpa1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_h1p0_zicsr2p0_shvstvala1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_h1p0_zicsr2p0_shvstvecd1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_h1p0_zicsr2p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zfinx1p0_zhinx1p0_zhinxmin1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zfinx1p0_zhinxmin1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_d2p2_q2p2_zicsr2p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zfinx1p0_zdinx1p0_zqinx1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_d2p2_zicsr2p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zfinx1p0_zdinx1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zfa1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zfbfmin1p0_zfhmin1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zfh1p0_zfhmin1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0_zfhmin1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_zfinx1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_f2p2_zicsr2p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_b1p0_zba1p0_zbb1p0_zbs1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zbkb1p0_zbkc1p0_zbkx1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zbkb1p0_zbkc1p0_zbkx1p0_zks1p0_zksed1p0_zksh1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvbb1p0_zvkb1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvkb1p0_zvkg1p0_zvkn1p0_zvkned1p0_zvkng1p0_zvknhb1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvbc1p0_zvkb1p0_zvkn1p0_zvknc1p0_zvkned1p0_zvknhb1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvkb1p0_zvkn1p0_zvkned1p0_zvknhb1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvkb1p0_zvkg1p0_zvks1p0_zvksed1p0_zvksg1p0_zvksh1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvbc1p0_zvkb1p0_zvks1p0_zvksc1p0_zvksed1p0_zvksh1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zvkb1p0_zvks1p0_zvksed1p0_zvksh1p0_zvkt1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smaia1p0_ssaia1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smcsrind1p0_sscsrind1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smcntrpmf1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smstateen1p0_ssstateen1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smepmp1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssaia1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscsrind1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscofpmf1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscounterenw1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssstateen1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sstc1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sstvala1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sstvecd1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssu64xl1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_svade1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_svadu1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_svbare1p0
[0-9a-f]+ l d .riscv.attributes 0+000 .riscv.attributes
|
