1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
#PROG: objcopy
#source: out-of-order.s
#ld: -e v1 -Ttext-segment=0x400000
#objdump: -D
#skip: *-*-pe *-wince-* *-*-coff
#name: Check if disassembler can handle all sections in default order
.*: +file format .*arm.*
Disassembly of section \.func1:
.+ <v1>:
[^:]+: e0800001 add r0, r0, r1
[^:]+: 00000000 andeq r0, r0, r0
Disassembly of section \.func2:
.+ <\.func2>:
[^:]+: e0800001 add r0, r0, r1
Disassembly of section \.func3:
.+ <\.func3>:
[^:]+: e0800001 add r0, r0, r1
[^:]+: e0800001 add r0, r0, r1
[^:]+: e0800001 add r0, r0, r1
[^:]+: e0800001 add r0, r0, r1
[^:]+: e0800001 add r0, r0, r1
[^:]+: 00000000 andeq r0, r0, r0
Disassembly of section \.rodata:
.+ <\.rodata>:
[^:]+: 00000000 andeq r0, r0, r0
Disassembly of section \.global:
.+ <.+>:
...
Disassembly of section \.ARM\.attributes:
.+ <\.ARM\.attributes>:
[^:]+: .+
[^:]+: .+
[^:]+: .+
[^:]+: .+
[^:]+: .+
|
