| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2024-02-13 | sim: riscv: Add support for compressed integer instructions | Jaydeep Patil | 5 | -4/+99 |
| 2023-10-18 | sim/riscv: fix JALR instruction simulation | Jaydeep Patil | 2 | -3/+31 |
| 2022-10-11 | sim/riscv: fix multiply instructions on simulator | Tsukasa OI | 1 | -0/+18 |
| 2022-02-16 | sim: testsuite: cleanup the istarget * logic | Mike Frysinger | 1 | -10/+7 |
| 2021-11-28 | sim: testsuite: drop most specific istarget checks | Mike Frysinger | 1 | -1/+1 |
| 2021-11-26 | sim: testsuite: rework sim_init usage | Mike Frysinger | 1 | -0/+2 |
| 2021-08-17 | sim: rename ChangeLog files to ChangeLog-2021 | Mike Frysinger | 1 | -0/+0 |
| 2021-04-08 | sim: testsuite: calculate $arch from $subdir | Mike Frysinger | 2 | -4/+4 |
| 2021-02-13 | sim: testsuite: push $arch out to targets | Mike Frysinger | 2 | -0/+8 |
| 2021-02-04 | sim: riscv: new port | Mike Frysinger | 4 | -0/+77 |
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index : riscv-gnu-toolchain/binutils.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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