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path: root/sim/mips/interp.c
AgeCommit message (Expand)AuthorFilesLines
2023-01-01sim: replace -I$srcroot/bfd include with -I$srcrootMike Frysinger1-1/+1
2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
2022-12-22sim: mips: switch from SIM_ADDR to address_wordMike Frysinger1-29/+11
2022-12-21sim: mips: invert sim_cpu storageMike Frysinger1-47/+65
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger1-4/+4
2022-10-31sim: reg: constify store helperMike Frysinger1-2/+2
2022-10-31sim: common: change sim_read & sim_write to use void* buffersMike Frysinger1-15/+15
2022-05-13sim: remove use of PTRAlan Modra1-2/+2
2022-02-04sim: mips: Add simulator support for mips32r6/mips64r6Faraz Shahbazker1-1/+5
2022-01-06sim: mips: migrate to standard uintXX_t typesMike Frysinger1-25/+25
2022-01-01sim: mips: clean up bad style/whitespaceMike Frysinger1-73/+73
2021-11-25sim: mips: avoid _ namespaceMike Frysinger1-3/+3
2021-11-15sim: split program path out of argv vectorMike Frysinger1-5/+1
2021-06-18sim: split sim-signal.h include outMike Frysinger1-0/+1
2021-06-16sim: mips: add printf attribute to trace funcMike Frysinger1-1/+1
2021-06-16sim: mips: rework dynamic printf logic to avoid compiler warningsMike Frysinger1-8/+33
2021-06-16sim: mips: fix format warnings when setting up memoryMike Frysinger1-18/+18
2021-05-29sim: mips: fix build w/out dv-sockserMike Frysinger1-1/+5
2021-05-22sim: mips: Add shadow mappings for 32-bit memory address spaceFaraz Shahbazker1-3/+11
2021-05-22sim: mips: Only truncate sign extension bits for 32-bit target modelsFaraz Shahbazker1-6/+5
2021-05-17sim: mips: invert sim_state storageMike Frysinger1-1/+2
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-4/+3
2021-05-14sim: create header namespaceMike Frysinger1-2/+2
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-1/+1
2021-04-04sim: mips: Add handlers to simulator monitor for unlink, lseek and statFaraz Shahbazker1-1/+69
2021-02-06sim: watchpoints: use common sim_pc_getMike Frysinger1-1/+0
2021-01-30sim: watchpoints: change sizeof_pc to sizeof(sim_cia)Mike Frysinger1-1/+0
2021-01-11sim: clean up C11 header includesMike Frysinger1-8/+0
2016-01-12sim: mips: workaround 32-bit addr sign extensionsMike Frysinger1-1/+12
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger1-2/+4
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger1-3/+1
2015-12-30sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to...Mike Frysinger1-20/+11
2015-12-26sim: mips: delete mmu stubs to move to common sim_{read,write}Mike Frysinger1-86/+22
2015-12-24sim: delete SIM_HAVE_FLATMEM supportMike Frysinger1-3/+0
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger1-20/+1
2015-09-25[PATCH] Add micromips support to the MIPS simulatorAndrew Bennett1-30/+23
2015-06-12sim: mips: switch to common WITH_TRACE_ANY_PMike Frysinger1-26/+19
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger1-2/+2
2015-04-13sim: mips: convert to sim-cpuMike Frysinger1-7/+27
2015-04-13sim: mips: fix prototype warningsMike Frysinger1-63/+30
2015-03-24sim: m68hc11/mips/mn10300/v850: add basic sim_pc_getMike Frysinger1-0/+5
2014-01-07remove PARAMS from simTom Tromey1-8/+4
2012-05-19 PR 14072Nick Clifton1-0/+1
2011-07-05sim: start a unified sim_do_commandMike Frysinger1-10/+0
2011-02-14sim: punt zfree()Mike Frysinger1-3/+3
2010-04-14sim: constify sim_write source buffer (part 2)Mike Frysinger1-1/+1
2010-01-18Cannot build mips simulator on darwin.Joel Brobecker1-2/+0
2007-09-04* interp.c (options enum): Add OPTION_INFO_MEMORY.Nick Clifton1-0/+45
2007-02-19 * interp.c (sim_monitor): Flush stdout and stderr file descriptorsThiemo Seufer1-0/+4
2007-02-19 (ColdReset): Set CP0 Config0 to reflect the address size supportedThiemo Seufer1-4/+53
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