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Run gdb/contrib/spellcheck.sh on directory sim.
Fix auto-corrected typos:
...
accessable -> accessible
accidently -> accidentally
accomodate -> accommodate
adress -> address
afair -> affair
agains -> against
agressively -> aggressively
annuled -> annulled
arbitary -> arbitrary
arround -> around
auxillary -> auxiliary
availablity -> availability
clasic -> classic
comming -> coming
controled -> controlled
controling -> controlling
destory -> destroy
existance -> existence
explictly -> explicitly
faciliate -> facilitate
fouth -> fourth
fullfilled -> fulfilled
guarentee -> guarantee
hinderance -> hindrance
independant -> independent
inital -> initial
loosing -> losing
occurance -> occurrence
occured -> occurred
occuring -> occurring
omited -> omitted
oportunity -> opportunity
parallely -> parallelly
permissable -> permissible
postive -> positive
powerfull -> powerful
preceed -> precede
preceeding -> preceding
preceeds -> precedes
primative -> primitive
probaly -> probably
programable -> programmable
propogate -> propagate
propper -> proper
recieve -> receive
reconized -> recognized
refered -> referred
refering -> referring
relevent -> relevant
responisble -> responsible
retreive -> retrieve
safty -> safety
specifiying -> specifying
spontanous -> spontaneous
sqaure -> square
successfull -> successful
supress -> suppress
sytem -> system
thru -> through
transfered -> transferred
trigered -> triggered
unfortunatly -> unfortunately
upto -> up to
usefull -> useful
wierd -> weird
writen -> written
doesnt -> doesn't
isnt -> isn't
...
Manually undid the "andd -> and" transformation in sim/testsuite/cr16/andd.cgs
and sim/cr16/simops.c.
Tested by rebuilding on x86_64-linux.
Approved-By: Tom Tromey <tom@tromey.com>
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Delete conflicting decls when the existing scope has vars of the same
name & type for this exact use.
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Running the H8 port through the GCC testsuite currently takes 4h 30m on my
fastest server -- that's roughly 1.5hrs per multilib tested and many tests are
disabled for various reasons.
To put that 1.5hr/multilib in perspective, that's roughly 3X the time for other
embedded targets. Clearly something isn't working as well as it should.
A bit of digging with perf shows that we're spending a crazy amount of time
decoding instructions in the H8 simulator. It's not hard to see why --
basically we take a blob of instruction data, then try to match it to every
instruction in the H8 opcode table starting at the beginning. That table has
~8000 entries (each different addressing mode is considered a different
instruction in the table).
Naturally my first thought was to sort the table and use a binary search to
find the right entry. That's made excessively complex due to the encoding on
the H8. Just getting the sort right would be much more complex than I'd
consider advisable.
Another thought was to build a mapping to the right entry for all the
instructions that can be disambiguated based on the first nibble (4 bits) of
instruction data and a mapping for those which can be disambiguated based on
the first byte of instruction data.
That seemed feasible until I realized that the H8/SX did some truly horrid
things with encoding branches in the 0x4XYY opcode space. It uses an "always
zero" bit in the offset to encode new semantic information. So we can't select
on just 0x4X. Ugh!
We could always to a custom decoder. I've done several through the years, they
can be very fast. But no way I can justify the time to do that.
So what I settled on was to first sort the opcode table by the first nibble,
then find the index of the first instruction for each nibble. Decoding uses
that index to start its search. This cuts the overall build/test by more than
half.
Next I adjusted the sort so that instructions that are not available on the
current sub architecture are put at the end of the table. This shaves another
~15% off the total cycle time.
The net of the two changes is on my fastest server we've gone from 4:30 to 1:40
running the GCC testsuite. Same test results before/after, of course. It's
still not fast, but it's a hell of a lot better.
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The verbose argument has always been an int treated as a bool, so
convert it to an explicit bool. Further, update the API docs to
match the reality that the verbose value is actually used by some
of the internal modules.
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We have many uses of sys/stat.h that are unprotected by HAVE_SYS_STAT_H,
so this is more formalizing the reality that we require this header.
Since we switched to gnulib, it guarantees that a sys/stat.h exists
for us to include, so we're doubly OK.
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All the runtimes were only initializing a single CPU. When SMP is
enabled, things quickly crash as none of the other CPU structs are
setup. Change the default from 0 to the compile time value.
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There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
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We've been using SIM_ADDR which has always been 32-bit. This means
the upper 32-bit address range in 64-bit sims is inaccessible. Use
64-bit addresses all the time since we want the APIs to be stable
regardless of the active arch backend (which can be 32 or 64-bit).
The length is also 64-bit because it's completely feasible to have
a program that is larger than 4 GiB in size/image/runtime. Forcing
the caller to manually chunk those accesses up into 4 GiB at a time
doesn't seem useful to anyone.
Bug: https://sourceware.org/PR7504
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These headers define the register numbers for each port to implement
the sim_fetch_register & sim_store_register interfaces. While gdb
uses these, the APIs are part of the sim, not gdb. Move the headers
out of the gdb/ include namespace and into sim/ instead.
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Rather than rely on pulling out the first cpu from the sim state
for cpu state, pass down the active cpu that's already available.
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When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense. Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
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These functions only read from memory, so mark the pointer as const.
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When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense. Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
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There are two places in the h8300 simulator where we assign a variable
to itself. Clang gives a warning for this, which is converted into an
error by -Werror.
Silence the warning by removing the self assignments. As these
assignments were in a complex if/then/else tree, rather than try to
adjust all the conditions, I've just replaced the self assignments
with a comment and an empty statement.
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The upstream GCC tester has showed spurious execution failures on the
H8 target for the H8/SX multilibs. I suspected memory corruption or an
uninitialized variable early as the same binary would sometimes work and
sometimes it got the wrong result. Worse yet, the point where the test
determined it was getting the wrong result would change.
Because it only happened on the H8/SX variant I was able to zero in on
the "mova" support and the "short form" of those instructions in particular.
As the code stands it checks if code->op3.type == 0 to try and identify cases
where op3 wasn't filled in and thus we've got the short form of the mova
instruction.
But for the short-form of those instructions we never set any of the "op3"
data structure. We get whatever was lying around -- it's usually zero and
thus things usually work, but if the stale data was nonzero, then we'd
fail to recognize the instruction as a short-form and fail to set up the
various fields appropriately.
I initially initialized the op3.type field to zero, but didn't like that
because it was inconsistent with how other operands were initialized.
Bringing consistency meant using -1 as the initializer value and adjusting
the check for short form mova appropriately.
I've had this in the upstream GCC tester for perhaps a year at this point
and haven't seen any of the intermittent failures again.
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We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program. Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.
So let's split the path to the program to run out into a separate
field by itself. This simplifies the various sim_open funcs too.
By itself, this code is more of a logical cleanup than something that
is super useful. But it will open up customization of argv[0] in a
follow up commit. Split the changes to make it easier to review.
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The sim-basics.h is too big and includes too many things. This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
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The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified). If none are specified, the arch is
expected to support both, and the value will be probed based on the
user runtime options or the input program.
Only two arches today set the default value (bpf & mips). We can
probably let this go as it only shows up in one scenario: the sim
is invoked, but with no inputs, and no user endian selection. This
means bpf will not behave like the other arches: an error is shown
and forces the user to make a choice. If an input program is used
though, we'll still switch the default to that. This allows us to
remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting.
For the ports that set a "wire" endian, move it to the runtime init
of the respective sim_open calls. This allows us to change the
WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting
if they want to force a specific endianness.
With all the endian logic moved to runtime selection, we can move
the configure call up to the common dir so we only process it once
across all ports.
The ppc arch was picking the wire endian based on the target used,
but since we weren't doing that for other biendian arches, we can
let this go too. We'll rely on the input selecting the endian, or
make the user decide.
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The sim-basics.h is too big and includes too many things. This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
Start with splitting out sim/callback.h.
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* sim-main.h (h8_typecodes): Add operand type OP_REG_DEC, OP_REG_INC.
* compile.c (decode): Rewrite oprand type for specific case.
(fetch_1): Add handling OP_REG_DEC and OP_REG_INC.
(step_once): Fix operand fetch order.
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The defs.h header will take care of including the various config.h
headers. For now, it's just config.h, but we'll add more when we
integrate gnulib in.
This header should be used instead of config.h, and should be the
first include in every .c file. We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h. We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way. Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
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A random grab bag of minor fixes to enable -Werror for this port.
Disable h8_set_macS for now as it's unused.
Initialize trace & intMask before using them.
Mark local set_h8300h function static.
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Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
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GCC gives a -Wsequence-point warning for this code in the h8300 sim.
The bug is that memory_size is both assigned and used in the same
expression. The fix is to assign after the print.
sim/h8300/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* compile.c (init_pointers): Fix sequence point warning.
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This changes all the non-generated (hand-written) code in sim to use
"new" (post-K&R) style function definitions.
2021-04-08 Tom Tromey <tom@tromey.com>
* bpf.c (bpf_def_model_init): Use new-style declaration.
sim/common/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* cgen-utils.c (RORQI, ROLQI, RORHI, ROLHI, RORSI, ROLSI): Use
new-style declaration.
sim/erc32/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sis.c (run_sim, main): Use new-style declaration.
* interf.c (run_sim, sim_open, sim_close, sim_load)
(sim_create_inferior, sim_store_register, sim_fetch_register)
(sim_info, sim_stop_reason, flush_windows, sim_do_command): Use
new-style declaration.
* help.c (usage, gen_help): Use new-style declaration.
* func.c (batch, set_regi, set_rega, disp_reg, limcalc)
(reset_stat, show_stat, init_bpt, int_handler, init_signals)
(disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event)
(init_event, set_int, advance_time, now, wait_for_irq, check_bpt)
(reset_all, sys_reset, sys_halt): Use new-style declaration.
* float.c (get_accex, clear_accex, set_fsr): Use new-style
declaration.
* exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec)
(chk_asi, execute_trap, check_interrupts, init_regs): Use
new-style declaration.
* erc32.c (init_sim, reset, decode_ersr, mecparerror)
(error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt)
(close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq)
(set_sfsr, mec_read, mec_write, init_stdio, restore_stdio)
(port_init, read_uart, write_uart, flush_uart, uarta_tx)
(uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr)
(wdog_start, rtc_intr, rtc_start, rtc_counter_read)
(rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start)
(gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl)
(memory_read, memory_write, get_mem_ptr, sis_memory_write)
(sis_memory_read): Use new-style declaration.
sim/frv/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use
new-style declaration.
sim/h8300/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* compile.c (cmdline_location): Use new-style declaration.
sim/iq2000/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
* iq2000.c (fetch_str): Use new-style declaration.
sim/lm32/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
sim/m32r/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
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The h8300 sim has its own implementation for memory handling that I'd
like to replace with the common sim memory code. However, it's got a
weird bit of code it calls "eightbit mem" that makes this not as easy
as it would otherwise be. The code has this comment:
/* These define the size of main memory for the simulator.
Note the size of main memory for the H8/300H is only 256k. Keeping it
small makes the simulator run much faster and consume less memory.
The linker knows about the limited size of the simulator's main memory
on the H8/300H (via the h8300h.sc linker script). So if you change
H8300H_MSIZE, be sure to fix the linker script too.
Also note that there's a separate "eightbit" area aside from main
memory. For simplicity, the simulator assumes any data memory reference
outside of main memory refers to the eightbit area (in theory, this
can only happen when simulating H8/300H programs). We make no attempt
to catch overlapping addresses, wrapped addresses, etc etc. */
I've read the H8/300 Programming Manual and the H8/300H Software Manual
and can't find documentation on it. The closest I can find is the bits
about the exception vectors, but that sounds like a convention where the
first 256 bytes of memory are used for a special purpose. The sim will
actually allocate a sep memory buffer of 256 bytes and you address it by
accessing anywhere outside of main memory. e.g. I would expect code to
access it like:
uint32_t *data = (void *)0;
data[0] = reset_exception_vector;
not like the sim expects like:
uint8_t *data = (void *)0x1000000;
data[0] = ...;
The gcc manual has an "eightbit_data" attribute:
Use this attribute on the H8/300, H8/300H, and H8S to indicate that
the specified variable should be placed into the eight-bit data
section. The compiler generates more efficient code for certain
operations on data in the eight-bit data area. Note the eight-bit
data area is limited to 256 bytes of data.
And the gcc code implies that it's accessed via special addressing:
eightbit_data: This variable lives in the 8-bit data area and can
be referenced with 8-bit absolute memory addresses.
I'm fairly certain these are referring to the 8-bit addressing modes
that allow access to 0xff00 - 0xffff with only an 8-bit immediate.
They aren't completely separate address spaces which this eightbit
memory buffer occupies.
But the sim doesn't access its eightbit memory based on specific insns,
it does it purely on the addresses requested.
Unfortunately, much of this code was authored by Michael Snyder, so I
can't ask him :(. I asked Renesas support and they didn't know:
https://renesasrulz.com/the_vault/f/archive-forum/6952/question-about-eightbit-memory
So I've come to the conclusion that this was a little sim-specific hack
done for <some convenience> and has no relation to real hardware. And
as such, let's drop it until someone notices and can provide a reason
for why we need to support it.
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Since we require C11 now, we can assume many headers exist, and
clean up all of the conditional includes. It's not like any of
this code actually accounted for the headers not existing, just
whether we could include them.
The strings.h cleanup is a little nuanced: it isn't in C11, but
every use of it in the codebase will include strings.h only if
string.h doesn't exist. Since we now assume the C11 string.h
exists, we'll never include strings.h, so we can delete it.
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This is in preparation for converting h8300 over to the common memory
framework. It's not clear how much of a speed gain this was providing
in the first place -- a naive test of ~400k insns (using shlr.s) shows
that this code actually slowed things down a bit.
If anyone really cares about h8300 anymore, they can migrate to the
common insn caching logic.
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2016-01-03 Mike Frysinger <vapier@gentoo.org>
* sim-options.c (sim_parse_args): Mark argv array const.
* sim-options.h (sim_parse_args): Likewise.
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Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed. Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
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All the state is handled already by the common cpu allocation which
zeros out the entire state.
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We can leverage the cpu->regs array rather than going through the
function helpers to get nice compact code.
Further, fix up the return values: return -1 when we can't find a
register (and let the caller write out warnings), return 2/4 when
we actually write out that amount, and handle the zero reg.
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to common sim_{fetch,store}_register
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This array isn't used anywhere, and the init phase actually corrupts
some memory because the array has 18 elements but tries to set the
19th (ZERO) position.
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Register the options in sim_open like other arches to avoid having to hack
up the common modules.
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We can use the sim state everywhere now to get these values on the fly.
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This ends up being pretty easy as the h8300 port already supports
much of the common engine core.
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Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did. Now we have a single module that takes care of
all the logic for us.
Most of the non-cgen based ones could be deleted outright. The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.
We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
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This makes the common sim-cpu logic work.
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This sets up the sim_state structure and the cpu member to match what we
do in most other sims, and what the common code suggests. This is a step
to unifying on the sim-cpu.o object.
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These funcs are only used with the old run.o, and these sims use nrun.o,
so drop these stub funcs.
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On Windows, a recent gnulib update imported the lstat module, and
this caused a remote-sim.c build failure in struct host_callback_struct:
In file included from /[...]/gdb/remote-sim.c:34:0:
/[...]/gdb/../include/gdb/callback.h:93:9: error: duplicate member '_stati64'
int (*lstat) (host_callback *, const char *, struct stat *);
^
What happens it that gnulib's stat.h makes the following defines:
/* Large File Support on native Windows. */
#if 1
# define stat _stati64
#endif
and then:
#if 1
# if ! 0
/* mingw does not support symlinks, therefore it does not have lstat. But
without links, stat does just fine. */
# if !(defined __cplusplus && defined GNULIB_NAMESPACE)
# define lstat stat
# endif
So, the following fields in struct host_callback_struct...
int (*stat) (host_callback *, const char *, struct stat *);
int (*fstat) (host_callback *, int, struct stat *);
int (*lstat) (host_callback *, const char *, struct stat *);
... get translated to...
int (*_stati64) (host_callback *, const char *, struct _stati64 *);
int (*_fstati64) (host_callback *, int, struct _stati64 *);
int (*_stati64) (host_callback *, const char *, struct _stati64 *);
... which causes two fields to have the same name.
This patch fixes the issue by renaming the stat-related fields
by adding a "to_" prefix, similar to what is done in GDB's
target_ops vector.
include/gdb/ChangeLog:
* callback.h (struct host_callback_struct) <to_stat>: Renamed
from "stat".
<to_fstat>: Renamed from "fstat".
<to_lstat>: Renamed from "lstat".
sim/common/ChangeLog:
* sim-io.c (sim_io_stat, sim_io_fstat): Adjust calls to "stat"
and "fstat" callbacks by calls to "to_stat" and "to_fstat" (resp)
callbacks following renaming in callback.h.
* syscall.c (cb_syscall): Likewise. Adjust calls to "lstat"
callback by call to "to_lstat" callback
sim/cris/ChangeLog:
* traps.c (cris_break_13_handler): Adjust call to "fstat" callback
by call to "to_fstat" following renaming in callback.h.
sim/h8300/ChangeLog:
* compile.c (sim_resume): Adjust calls to "stat" and "fstat"
callbacks by calls to "to_stat" and "to_fstat" (resp) callbacks
following renaming in callback.h.
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There's no need for the prog_name handed down to the core to be mutable,
so add const markings to it and all the related funcs.
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