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AgeCommit message (Expand)AuthorFilesLines
2024-01-06sim: cris: change temp var name slightly to avoid shadowingMike Frysinger2-48/+48
2024-01-06sim: cris: add error fallbacks when decoding condition & swap codesMike Frysinger2-0/+24
2023-12-24sim: cris: rvdummy: delete unused variableMike Frysinger1-1/+0
2023-12-24sim: cgen: regenerate decode tablesMike Frysinger2-2753/+2753
2023-12-23sim: warnings: rework individual flag disable into dedicated varsMike Frysinger1-3/+3
2023-12-22sim: cris: disable -Wshadow=local in generated mloop filesMike Frysinger1-0/+2
2023-12-22sim: cris: fix -Wshadow=local warningsMike Frysinger2-2/+0
2023-12-22sim: cgen: regenerate decode tables to avoid shadow warningsMike Frysinger2-260/+260
2023-12-22sim: cris: regen cgen decoders to fix build warnings [PR sim/31181]Mike Frysinger2-211/+211
2023-12-21sim: mloop: add #line pragmas everywhereMike Frysinger1-0/+5
2023-12-21sim: cris: fix -Wimplicit-fallthrough warningsMike Frysinger2-1/+5
2023-12-21sim: signal: mark signal callback funcs as noreturn since they don't returnMike Frysinger1-1/+1
2023-12-20sim: cgen: unify the genmloop logic a bitMike Frysinger1-8/+6
2023-12-19sim: cris: fix -Wunused-variable warningsMike Frysinger3-6/+0
2023-12-19cpu: cris: drop some unused varsMike Frysinger2-5/+5
2023-12-07sim: cris: fix -Wunused-but-set-variable warningsMike Frysinger2-4/+7
2023-12-06sim: cris: move generated file to right placeMike Frysinger1-1/+1
2023-08-19Placate -Wmissing-declarations in sim/crisTom Tromey1-0/+10
2023-08-19Remove extraneous '%' from sim/cris/local.mkTom Tromey1-1/+1
2023-08-19sim regenAlan Modra15-33/+53
2023-08-19sim --enable-cgen-maintAlan Modra1-3/+3
2023-08-09Rename bfd_bread and bfd_bwriteAlan Modra1-2/+2
2023-01-16sim: assume sys/stat.h always exists (via gnulib)Mike Frysinger1-2/+0
2023-01-16sim: formally assume unistd.h always exists (via gnulib)Mike Frysinger3-7/+0
2023-01-15sim: modules.c: fix generation after recent refactorsMike Frysinger1-0/+3
2023-01-14sim: common: move modules.c to source trackingMike Frysinger1-1/+2
2023-01-14sim: build: drop most recursive build depsMike Frysinger1-2/+1
2023-01-14sim: common: move libcommon.a objects to sourcesMike Frysinger1-2/+2
2023-01-14sim: build: drop AM_MAKEFLAGS settingsMike Frysinger1-1/+0
2023-01-11sim: build: drop subdir Makefile.in filesMike Frysinger1-24/+0
2023-01-10sim: move arch-specific file compilation of common/ files to top-levelMike Frysinger1-2/+2
2023-01-10sim: cris: move arch-specific file compilation to top-levelMike Frysinger1-3/+0
2023-01-10sim: build: drop support for creating libsim.a in subdirsMike Frysinger1-2/+0
2023-01-10sim: cris: move libsim.a creation to top-levelMike Frysinger2-11/+38
2023-01-10sim: modules: trigger generation from top-levelMike Frysinger1-0/+1
2023-01-02sim: build: move generated headers to built sourcesMike Frysinger1-2/+4
2023-01-02sim: cris: hoist cgen rules to top-levelMike Frysinger2-33/+17
2023-01-01sim: replace -I$srcroot/bfd include with -I$srcrootMike Frysinger1-1/+1
2023-01-01sim: replace -I$srcroot/opcodes include with -I$srcrootMike Frysinger1-2/+2
2023-01-01Update copyright year range in header of all files managed by GDBJoel Brobecker29-29/+29
2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
2022-12-23sim: cgen: move symcat.h include to where it's usedMike Frysinger1-1/+0
2022-12-23sim: cgen: move cgen-types.h include to cgen-defs.hMike Frysinger1-1/+0
2022-12-22sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504]Mike Frysinger1-2/+2
2022-12-22sim: use bfd_vma when reading start addr from bfd infoMike Frysinger1-2/+2
2022-12-21sim: build: hoist lists of hw devices upMike Frysinger2-4/+5
2022-12-21sim: enable common sim_cpu usage everywhereMike Frysinger1-2/+0
2022-12-21sim: cris: invert sim_cpu storageMike Frysinger6-239/+244
2022-11-05sim: run: move linking into top-levelMike Frysinger1-0/+8
2022-11-05sim: cris: move rvdummy linking to top-levelMike Frysinger2-12/+8
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