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AgeCommit message (Expand)AuthorFilesLines
2021-10-04sim: add --info-target for listing supported BFD targetsMike Frysinger1-0/+19
2021-10-03sim: filter out SIGSTKSZ [PR sim/28302]Mike Frysinger2-3/+4
2021-09-28sim: drop weak func attrs on module initsMike Frysinger1-1/+1
2021-09-11sim: run: change help short option to -hMike Frysinger1-1/+1
2021-09-09sim: accept -EB/-EL short optionsMike Frysinger1-3/+3
2021-09-09sim: drop old O_NDELAY & FNBLOCK supportMike Frysinger2-22/+4
2021-09-09sim: dv-sockser: enable for mingw targets tooMike Frysinger1-4/+4
2021-09-09sim: cgen: workaround Windows VOID defineMike Frysinger1-0/+2
2021-09-09sim: dv-sockser: move sim-main.h include after system includesMike Frysinger1-2/+1
2021-08-19sim: nltvals: switch output mode to a directoryMike Frysinger1-5/+8
2021-08-17sim: nltvals: localize TARGET_<ERRNO> definesMike Frysinger1-5/+1
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-07-01sim: unify reserved instruction bits settingsMike Frysinger2-2/+4
2021-07-01cgen: split GUILE setting outMike Frysinger2-1/+7
2021-06-30sim: unify scache settingsMike Frysinger4-8/+8
2021-06-30sim: move scache init to dynamic modules.cMike Frysinger4-7/+12
2021-06-30sim: move profile init to dynamic modules.cMike Frysinger4-8/+11
2021-06-30sim: move trace init to dynamic modules.cMike Frysinger4-8/+11
2021-06-30sim: move engine init to dynamic modules.cMike Frysinger4-6/+10
2021-06-30sim: delete unused model settingsMike Frysinger2-23/+6
2021-06-30sim: move default model to the runtime sim stateMike Frysinger5-16/+21
2021-06-30sim: namespace sim_machsMike Frysinger7-37/+67
2021-06-29sim: fix arch Makefile regen when unifiedMike Frysinger2-1/+7
2021-06-29sim: callback: add check for HAVE_KILLMike Frysinger2-0/+9
2021-06-29sim: model: constify sim_machs storageMike Frysinger3-6/+15
2021-06-29sim: io: add printf attributes to vprintf funcs tooMike Frysinger2-2/+9
2021-06-29sim: callback: add printf attributesMike Frysinger2-1/+7
2021-06-29sim: callback: drop unused printf helpersMike Frysinger3-66/+8
2021-06-29sim: cgen: require long long supportMike Frysinger3-29/+6
2021-06-27sim: cgen: suppress trace non-literal printf warningMike Frysinger2-0/+10
2021-06-27sim: cgen: add asserts to fix unused engine warningsMike Frysinger2-1/+8
2021-06-27sim: cgen: add printf attributes in a few more callsMike Frysinger2-2/+7
2021-06-27sim: cgen: constify trace stringsMike Frysinger3-8/+17
2021-06-27sim: cgen: always leverage the mem prototypesMike Frysinger2-14/+55
2021-06-27sim: cgen: always leverage the ops prototypesMike Frysinger2-50/+50
2021-06-27sim: cgen: sync prototypes with implementationMike Frysinger2-17/+27
2021-06-23sim: syscall: handle killing the sim itselfMike Frysinger2-2/+18
2021-06-23sim: callback: add a kill interfaceMike Frysinger3-0/+35
2021-06-23sim: switch common srcdir to abs_srcdirMike Frysinger2-1/+5
2021-06-22sim: callback: add missing cb_target_to_host_signalMike Frysinger2-0/+17
2021-06-22sim: callback: generate signal mapMike Frysinger3-0/+36
2021-06-22sim: callback: add a getpid interfaceMike Frysinger3-1/+21
2021-06-22sim: drop configure scripts for simple portsMike Frysinger2-7/+20
2021-06-21sim: unify hardware settingsMike Frysinger2-4/+4
2021-06-21sim: hw: rework configure option & device selectionMike Frysinger2-4/+14
2021-06-20sim: unify cgen maintainer settingsMike Frysinger2-1/+4
2021-06-20sim: move sim-inline to the common codeMike Frysinger2-1/+4
2021-06-19sim: move UNUSED before TYPE in SIM_ENDIAN_INLINE's definitionSimon Marchi2-27/+31
2021-06-19sim: drop old BUILT_SRC_FROM_COMMON refMike Frysinger2-3/+4
2021-06-19sim: unify gettext/intl probing logicMike Frysinger2-3/+6
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