| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2002-11-23 | 2002-11-22 Andrew Cagney <ac131313@redhat.com> | Andrew Cagney | 1 | -19/+22 |
| 2001-03-16 | * tweak | Frank Ch. Eigler | 1 | -3/+3 |
| 1999-04-26 | import gdb-19990422 snapshot | Stan Shebs | 1 | -9/+6 |
| 1999-04-16 | Initial creation of sourceware repositorygdb-4_18-branchpoint | Stan Shebs | 1 | -0/+839 |
| 1999-04-16 | Initial creation of sourceware repository | Stan Shebs | 1 | -820/+0 |
| 1998-06-11 | * sim-core.h (SIM_CORE_SIGNAL_FN): New typedef. | Doug Evans | 1 | -130/+155 |
| 1998-03-04 | * sim-core.c (sim_core_attach): Use xmalloc instead of zalloc. | Doug Evans | 1 | -6/+3 |
| 1998-03-03 | Good grief. Detailed function descriptions should accompany their definition. | Doug Evans | 1 | -11/+1 |
| 1998-03-03 | (sim_core_attach): Add a comment describing its function. | Doug Evans | 1 | -1/+13 |
| 1998-03-02 | * sim-core.c (sim_core_attach): Revise last patch. | Doug Evans | 1 | -1/+4 |
| 1998-03-02 | * sim-core.c (sim_core_attach): Use xmalloc instead of zalloc. | Doug Evans | 1 | -2/+3 |
| 1998-02-25 | (profile_print_core): Simplify by calling sim_core_map_to_str. | Doug Evans | 1 | -1/+1 |
| 1998-02-20 | Backout of revision 1.35. Abort may be valid operation. | Andrew Cagney | 1 | -3/+14 |
| 1997-11-19 | * sim-core.c (sim_core_signal): Use sim_stopped instead of | Doug Evans | 1 | -2/+2 |
| 1997-11-19 | * sim-signal.c, sim-signal.h: New files. | Doug Evans | 1 | -11/+2 |
| 1997-11-18 | * sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value. | Doug Evans | 1 | -3/+1 |
| 1997-11-14 | (sim_core_signal): Add missing "\n" in message. | Doug Evans | 1 | -4/+7 |
| 1997-11-05 | Rewrite the MIPS simulator's memory model so that it uses the generic | Andrew Cagney | 1 | -9/+20 |
| 1997-10-31 | Make memory regions layered (just like existing device regions) so | Andrew Cagney | 1 | -68/+61 |
| 1997-10-28 | Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>. | Andrew Cagney | 1 | -4/+0 |
| 1997-10-27 | Add 128 bit transfers to sim core. | Andrew Cagney | 1 | -1/+5 |
| 1997-10-14 | Handle core regions which start at a poorly aligned address. | Andrew Cagney | 1 | -25/+37 |
| 1997-09-10 | * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoid | Felix Lee | 1 | -1/+1 |
| 1997-09-05 | Redo watchpoint code so that it target can specify interrupt names. | Andrew Cagney | 1 | -3/+7 |
| 1997-09-05 | Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue. | Andrew Cagney | 1 | -1/+1 |
| 1997-09-04 | o Add modulo argument to sim_core_attach | Andrew Cagney | 1 | -125/+224 |
| 1997-09-03 | Stanify error reporting memory overlaps. | Andrew Cagney | 1 | -8/+23 |
| 1997-08-30 | Passify GCC. Convert 0x0LL to something more portable in the FP code. | Andrew Cagney | 1 | -55/+199 |
| 1997-05-23 | Preliminary suport for xor-endian suport in core module. | Andrew Cagney | 1 | -19/+58 |
| 1997-05-21 | Watchpoint interface. | Andrew Cagney | 1 | -15/+49 |
| 1997-05-12 | c80 simulator fixes. | Andrew Cagney | 1 | -1/+1 |
| 1997-05-05 | Start of implementation of a distributed (between processors) | Andrew Cagney | 1 | -31/+52 |
| 1997-05-02 | Update devo version of m32r sim to build with recent sim/common changes. | Andrew Cagney | 1 | -8/+24 |
| 1997-05-01 | * Makefile.in (sim-options_h): Define. | David Edelsohn | 1 | -57/+83 |
| 1997-03-14 | Add a number of per-simulator options: hostendian, endian, inline, warnings. | Andrew Cagney | 1 | -0/+375 |
