Age | Commit message (Collapse) | Author | Files | Lines |
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(ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
(cris-dis.lo, cris-opc.lo): New rules.
* Makefile.in: Rebuild.
* configure.in (bfd_cris_arch): New target.
* configure: Rebuild.
* disassemble.c (ARCH_cris): Define.
(disassembler): Support ARCH_cris.
* cris-dis.c, cris-opc.c: New files.
* po/POTFILES.in, po/opcodes.pot: Regenerate.
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Reported by Bill Clarke <llib@computer.org>.
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Patch by Randall J Fisher <rfisher@ecn.purdue.edu>.
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Add -mall-opcodes, -mno-skip-bug, -mno-wrap.
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* arm-dis.c (regnames): Add an additional register set to match
the set used by GCC. Make it the default.
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* Makefile.am: Rebuild dependency.
* Makefile.in: Rebuild.
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for m68hc11 and m68hc12 processors.
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bfd_mach_ppc_620 instead of 620.
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(bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
correctly.
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and dec.l instructions
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sign-extending operands.
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(STD_REGISTER_NAMES): New name for REGISTER_NAMES.
(reg_names): Rename to std_reg_names. Change it to a char **
static variable.
(std_reg_names): New name for reg_names.
(set_mips_isa_type): Set reg_names to point to std_reg_names by
default.
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* approved by nickc
[opcodes/ChangeLog]
2000-05-16 Frank Ch. Eigler <fche@redhat.com>
* fr30-desc.h: Partially regenerated to account for changed
CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
* m32r-desc.h: Ditto.
[include/opcode/ChangeLog]
2000-05-16 Frank Ch. Eigler <fche@redhat.com>
* cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
(CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
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also available in common mode when powerpc syntax is being used.
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vector unit operands.
(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
unit instruction formats.
(PPCVEC): New macro, mask for vector instructions.
(powerpc_operands): Add table entries for above operand types.
(powerpc_opcodes): Add table entries for vector instructions.
* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
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FMUL instruction.
(reg_fmul_r): New. Extract source register from FMUL instruction.
(reg_muls_d): New. Extract destination register from MULS instruction.
(reg_muls_r): New. Extract source register from MULS instruction.
(reg_movw_d): New. Extract destination register from MOVW instruction.
(reg_movw_r): New. Extract source register from MOVW instruction.
(print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
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bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
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(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
new operand types l,y,&,fe,fE,fx.
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(disassemble): Use them.
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Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and
opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to
set it. Add configure option --enable-build-warnings.
Re-generate all and sundry using auto*-000227.
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* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
stc GBR,@-<REG_N> is available for arch_sh1_up.
Group parallel processing insn with identical mnemonics together.
Make three-operand psha / pshl come first.
gas:
* config/tc-sh.c (get_operands): There's no third operand if the
first operand is an immediate.
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