| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-01-15 | aarch64: rcpc3: Define address operand fields and inserter/extractors | Victor Do Nascimento | 1 | -0/+56 |
| 2024-01-15 | Add generated source files and fix thinko in aarch64-asm.c | Nick Clifton | 1 | -1/+1 |
| 2024-01-15 | aarch64: Add SVE2.1 dupq, eorqv and extq instructions. | Srinath Parvathaneni | 1 | -0/+16 |
| 2024-01-15 | aarch64: Add support for FEAT_SVE2p1. | Srinath Parvathaneni | 1 | -0/+14 |
| 2024-01-15 | aarch64: Add support for FEAT_SME2p1 instructions. | Srinath Parvathaneni | 1 | -0/+71 |
| 2024-01-04 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2023-03-30 | aarch64: Add the SME2 shift instructions | Richard Sandiford | 1 | -0/+14 |
| 2023-03-30 | aarch64: Add the SME2 saturating conversion instructions | Richard Sandiford | 1 | -0/+5 |
| 2023-03-30 | aarch64: Add the SME2 MLAL and MLSL instructions | Richard Sandiford | 1 | -1/+3 |
| 2023-03-30 | aarch64: Add the SME2 maximum/minimum instructions | Richard Sandiford | 1 | -0/+5 |
| 2023-03-30 | aarch64: Add the SME2 ADD and SUB instructions | Richard Sandiford | 1 | -0/+2 |
| 2023-03-30 | aarch64: Add the SME2 ZT0 instructions | Richard Sandiford | 1 | -0/+12 |
| 2023-03-30 | aarch64: Add the SME2 predicate-related instructions | Richard Sandiford | 1 | -4/+29 |
| 2023-03-30 | aarch64: Add the SME2 multivector LD1 and ST1 instructions | Richard Sandiford | 1 | -1/+22 |
| 2023-03-30 | aarch64: Add the SME2 MOVA instructions | Richard Sandiford | 1 | -1/+49 |
| 2023-03-30 | aarch64: Add support for predicate-as-counter registers | Richard Sandiford | 1 | -0/+1 |
| 2023-03-30 | aarch64: Add a _10 suffix to FLD_imm3 | Richard Sandiford | 1 | -2/+2 |
| 2023-03-30 | aarch64: Regularise FLD_* suffixes | Richard Sandiford | 1 | -2/+2 |
| 2023-03-30 | aarch64: Rename za_tile_vector to za_index | Richard Sandiford | 1 | -9/+9 |
| 2023-03-30 | aarch64: Make SME instructions use F_STRICT | Richard Sandiford | 1 | -1/+7 |
| 2023-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2022-10-17 | Allow explicit size specifier for predicate operand of {sq, uq, }{incp, decp} | CaiJingtao | 1 | -1/+2 |
| 2022-01-02 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2021-12-02 | aarch64: Add support for +mops | Richard Sandiford | 1 | -0/+13 |
| 2021-11-25 | Fix building the AArch64 assembler and disassembler when assertions are disab... | Nick Clifton | 1 | -13/+13 |
| 2021-11-17 | aarch64: [SME] SVE2 instructions added to support SME | Przemyslaw Wirkus | 1 | -0/+67 |
| 2021-11-17 | aarch64: [SME] Add SME mode selection and state access instructions | Przemyslaw Wirkus | 1 | -0/+25 |
| 2021-11-17 | aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions | Przemyslaw Wirkus | 1 | -0/+47 |
| 2021-11-17 | aarch64: [SME] Add MOV and MOVA instructions | Przemyslaw Wirkus | 1 | -0/+55 |
| 2021-04-19 | arm64: add two initializers | Jan Beulich | 1 | -2/+2 |
| 2021-03-31 | Use bool in opcodes | Alan Modra | 1 | -128/+128 |
| 2021-01-08 | Fix places in the AArch64 opcodes library code where a call to assert() has s... | Nick Clifton | 1 | -6/+7 |
| 2021-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2020-10-28 | aarch64: Add DSB instruction Armv8.7-a variant | Przemyslaw Wirkus | 1 | -0/+15 |
| 2020-04-20 | [AArch64, Binutils] Add missing TSB instruction | Sudakshina Das | 1 | -0/+11 |
| 2020-02-26 | Indent labels | Alan Modra | 1 | -2/+2 |
| 2020-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2019-11-07 | [binutils][aarch64] Bfloat16 enablement [2/X] | Matthew Malcomson | 1 | -0/+1 |
| 2019-07-01 | [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES | Matthew Malcomson | 1 | -2/+2 |
| 2019-05-09 | [binutils][aarch64] New sve_size_tsz_bhs iclass. | Matthew Malcomson | 1 | -0/+6 |
| 2019-05-09 | [binutils][aarch64] New sve_shift_tsz_bhsd iclass. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand. | Matthew Malcomson | 1 | -2/+4 |
| 2019-05-09 | [binutils][aarch64] New sve_size_013 iclass. | Matthew Malcomson | 1 | -0/+8 |
| 2019-05-09 | [binutils][aarch64] New sve_size_bh iclass. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New sve_size_sd2 iclass. | Matthew Malcomson | 1 | -0/+4 |
| 2019-05-09 | [binutils][aarch64] New iclass sve_size_hsd2. | Matthew Malcomson | 1 | -0/+5 |
| 2019-01-25 | AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte... | Sudi Das | 1 | -11/+0 |
| 2019-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2018-11-12 | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 1 | -0/+11 |
| 2018-11-12 | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 1 | -1/+2 |
