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2025-07-29PR 33223 ppc64: segfault on unknown relocationAlan Modra1-1/+1
Bounds check accesses to ppc64_elf_howto_table and don't dereference a NULL howto. I think this catches all cases where that might happen. PR 33223 bfd/ * elf64-ppc.c (ppc64_elf_info_to_howto): Consolidate error handling. (ppc64_elf_check_relocs): Tidy error messages. (ppc64_elf_relocate_section): Don't segfault when attempting to report an unsupported relocation. Don't pass a NULL howto to _bfd_clear_contents. ld/ * testsuite/ld-powerpc/elfv2-2so.d: Adjust to suit error message change.
2025-07-29ld: testsuite: Enable ld-elfweak tests on Solaris/x86Rainer Orth1-2/+2
The ld-elfweak tests are currently only enabled on Solaris/SPARC for no apparent reason. Enabling them on Solaris in general lets them all PASS on both amd64-pc-solaris2.11 and i386-pc-solaris2.11. 2025-07-25 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> ld: * testsuite/ld-elfweak/elfweak.exp: Enable on *-*-solaris2* rather than sparc*-*-solaris2* only.
2025-07-28ld: testsuite: Fix "PR ld/28138 (build only)" on SolarisRainer Orth1-1/+1
The FAIL: PR ld/28138 (build only) test FAILs on Solaris: ld/tmpdir/ld/collect-ld: plugin framework: out of file descriptors. Try using fewer objects/archives ld/tmpdir/ld/collect-ld: cannot find -lgcc: Too many open files [...] I found that the test PASSes when using ulimit -n 21 instead of the current 20. Looking with strace/truss, on Linux/i686 the following files are opened: 301543 openat(AT_FDCWD, "tmpdir/pr28138", O_RDWR|O_CREAT|O_TRUNC|O_LARGEFILE, 0666) = 3 301543 openat(AT_FDCWD, "/lib/../lib32/crt1.o", O_RDONLY|O_LARGEFILE) = 4 301543 openat(AT_FDCWD, "/lib/../lib32/crt1.o", O_RDONLY|O_LARGEFILE) = 5 301543 openat(AT_FDCWD, "/lib/../lib32/crti.o", O_RDONLY|O_LARGEFILE) = 5 301543 openat(AT_FDCWD, "/lib/../lib32/crti.o", O_RDONLY|O_LARGEFILE) = 6 301543 openat(AT_FDCWD, "lib/gcc/i686-pc-linux-gnu/12.1.0/crtbegin.o", O_RDONLY|O_LARGEFILE) = 6 301543 openat(AT_FDCWD, "lib/gcc/i686-pc-linux-gnu/12.1.0/crtbegin.o", O_RDONLY|O_LARGEFILE) = 7 301543 openat(AT_FDCWD, "tmpdir/pr28138.o", O_RDONLY|O_LARGEFILE) = 7 301543 openat(AT_FDCWD, "tmpdir/pr28138.o", O_RDONLY|O_LARGEFILE) = 8 301543 openat(AT_FDCWD, "tmpdir/pr28138.a", O_RDONLY|O_LARGEFILE) = 8 301543 openat(AT_FDCWD, "tmpdir/pr28138.a", O_RDONLY|O_LARGEFILE) = 9 301543 openat(AT_FDCWD, "tmpdir/pr28138-7.o", O_RDONLY|O_LARGEFILE) = 9 301543 openat(AT_FDCWD, "tmpdir/pr28138-7.o", O_RDONLY|O_LARGEFILE) = 10 301543 openat(AT_FDCWD, "tmpdir/pr28138-6.o", O_RDONLY|O_LARGEFILE) = 10 301543 openat(AT_FDCWD, "tmpdir/pr28138-6.o", O_RDONLY|O_LARGEFILE) = 11 301543 openat(AT_FDCWD, "tmpdir/pr28138-5.o", O_RDONLY|O_LARGEFILE) = 11 301543 openat(AT_FDCWD, "tmpdir/pr28138-5.o", O_RDONLY|O_LARGEFILE) = 12 301543 openat(AT_FDCWD, "tmpdir/pr28138-4.o", O_RDONLY|O_LARGEFILE) = 12 301543 openat(AT_FDCWD, "tmpdir/pr28138-4.o", O_RDONLY|O_LARGEFILE) = 13 301543 openat(AT_FDCWD, "tmpdir/pr28138-3.o", O_RDONLY|O_LARGEFILE) = 13 301543 openat(AT_FDCWD, "tmpdir/pr28138-3.o", O_RDONLY|O_LARGEFILE) = 3 301543 openat(AT_FDCWD, "tmpdir/pr28138-2.o", O_RDONLY|O_LARGEFILE) = 3 301543 openat(AT_FDCWD, "tmpdir/pr28138-2.o", O_RDONLY|O_LARGEFILE) = 4 301543 openat(AT_FDCWD, "tmpdir/pr28138-1.o", O_RDONLY|O_LARGEFILE) = 4 301543 openat(AT_FDCWD, "tmpdir/pr28138-1.o", O_RDONLY|O_LARGEFILE) = 5 while on Solaris/i386 there are a couple more: 27726: openat64(AT_FDCWD, "tmpdir/pr28138", O_RDWR|O_CREAT|O_TRUNC, 0666) = 4 27726: openat64(AT_FDCWD, "/usr/lib/crt1.o", O_RDONLY) = 5 27726: openat64(AT_FDCWD, "/usr/lib/crt1.o", O_RDONLY) = 6 27726: openat64(AT_FDCWD, "lib/gcc/i386-pc-solaris2.11/14.2.0/crtp.o", O_RDONLY) = 6 27726: openat64(AT_FDCWD, "lib/gcc/i386-pc-solaris2.11/14.2.0/crtp.o", O_RDONLY) = 7 27726: openat64(AT_FDCWD, "/usr/lib/crti.o", O_RDONLY) = 7 27726: openat64(AT_FDCWD, "/usr/lib/crti.o", O_RDONLY) = 8 27726: openat64(AT_FDCWD, "/usr/lib/values-Xa.o", O_RDONLY) = 8 27726: openat64(AT_FDCWD, "/usr/lib/values-Xa.o", O_RDONLY) = 9 27726: openat64(AT_FDCWD, "/usr/lib/values-xpg6.o", O_RDONLY) = 9 27726: openat64(AT_FDCWD, "/usr/lib/values-xpg6.o", O_RDONLY) = 10 27726: openat64(AT_FDCWD, "lib/gcc/i386-pc-solaris2.11/14.2.0/crtbegin.o", O_RDONLY) = 10 27726: openat64(AT_FDCWD, "lib/gcc/i386-pc-solaris2.11/14.2.0/crtbegin.o", O_RDONLY) = 11 27726: openat64(AT_FDCWD, "tmpdir/pr28138.o", O_RDONLY) = 11 27726: openat64(AT_FDCWD, "tmpdir/pr28138.o", O_RDONLY) = 12 27726: openat64(AT_FDCWD, "tmpdir/pr28138.a", O_RDONLY) = 12 27726: openat64(AT_FDCWD, "tmpdir/pr28138.a", O_RDONLY) = 13 27726: openat64(AT_FDCWD, "tmpdir/pr28138-7.o", O_RDONLY) = 13 27726: openat64(AT_FDCWD, "tmpdir/pr28138-7.o", O_RDONLY) = 14 27726: openat64(AT_FDCWD, "tmpdir/pr28138-6.o", O_RDONLY) = 14 27726: openat64(AT_FDCWD, "tmpdir/pr28138-6.o", O_RDONLY) = 15 27726: openat64(AT_FDCWD, "tmpdir/pr28138-5.o", O_RDONLY) = 15 27726: openat64(AT_FDCWD, "tmpdir/pr28138-5.o", O_RDONLY) = 16 27726: openat64(AT_FDCWD, "tmpdir/pr28138-4.o", O_RDONLY) = 16 27726: openat64(AT_FDCWD, "tmpdir/pr28138-4.o", O_RDONLY) = 17 27726: openat64(AT_FDCWD, "tmpdir/pr28138-3.o", O_RDONLY) = 17 27726: openat64(AT_FDCWD, "tmpdir/pr28138-3.o", O_RDONLY) = 18 27726: openat64(AT_FDCWD, "tmpdir/pr28138-2.o", O_RDONLY) = 18 27726: openat64(AT_FDCWD, "tmpdir/pr28138-2.o", O_RDONLY) = 19 27726: openat64(AT_FDCWD, "tmpdir/pr28138-1.o", O_RDONLY) = 19 27726: openat64(AT_FDCWD, "tmpdir/pr28138-1.o", O_RDONLY) Err#24 EMFILE While it seems weird that the same files are opened twice for reading, it's no wonder that 20 fds aren't enough on Solaris. To avoid this, I've raised the limit to 25, hoping that this will be enough on more targets. Tested on i386-pc-solaris2.11 and i686-pc-linux-gnu. 2025-07-25 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> ld: * testsuite/ld-plugin/lto.exp (PR ld/28138 test): Raise fd limit to 25.
2025-07-28ld: testsuite: Skip "Run with libpr19553c.so" test on SolarisRainer Orth1-4/+11
The FAIL: Run with libpr19553c.so test FAILs on Solaris (32 and 64-bit, sparc and x86): Running: tmpdir/pr19553c > tmpdir/pr19553c.out diff tmpdir/pr19553c.out /vol/src/gnu/binutils/hg/master/local/ld/testsuite/ld-elf/pr19553c.out 1c1 < pr19553b --- > pr19553c child process exited abnormally The test uses .symver, resulting in versioned symbols which the Solaris ld.so.1 doesn't support and never will. Running it with LD_DEBUG=all shows 26493: 1: symbol=foo; lookup in file=tmpdir/pr19553c [ ELF ] 26493: 1: symbol=foo; lookup in file=tmpdir/libpr19553c.so [ ELF ] 26493: 1: symbol=foo; skipping entry in file=tmpdir/libpr19553c.so, index[7], version=FOO, due to GNU version hidden bit 26493: 1: symbol=foo; continuing lookup in file=tmpdir/libpr19553c.so [ ELF ] 26493: 1: symbol=foo; lookup in file=tmpdir/libpr19553b.so [ ELF ] 26493: 1: binding file=tmpdir/pr19553c to file=tmpdir/libpr19553b.so: symbol 'foo' so this patch skips the test. 2025-07-25 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> ld: * testsuite/ld-elf/indirect.exp (Run with libpr19553c.so): Skip on *-*-solaris2*.
2025-07-22RISC-V: Don't allocate dynamic relocation if it's section was discardedNelson Chu1-0/+45
2025-07-22RISC-V: Fix the assert fail when linking discarded sections under -pie for gotNelson Chu6-0/+61
Considering the following case, % cat tmp.s .option pic .text .global _start _start: nop .section .discard.s, "ax" la x1, _start % cat tmp.ld OUTPUT_ARCH(riscv) ENTRY(_start) SECTIONS { /DISCARD/ : { *(.discard.*) } . = 0x10000; .text : { *(.text) } . = 0x20000; .got : { *(.got) *(.got.plt)} . = 0x30000; .data : { *(.data) *(.data.*) } } % riscv64-unknown-linux-gnu-as tmp.s -o tmp.o % riscv64-unknown-linux-gnu-ld -pie -Ttmp.ld tmp.o riscv64-unknown-linux-gnu-ld: BFD (GNU Binutils) 2.44.50.20250624 assertion fail binutils-gdb/bfd/elfnn-riscv.c:3638 This happens when pie and the input sections, which refers to the global symbol by got, are all discarded. Since referenced sections are all discarded, we won't go into relocate_section for those sections, the got entry also won't be initialized. Therefore, we will get assert fail when adding the RELATIVE reloc in the finish_dynamic_symbol. After seeing other target codes, there are two root causes as follows, 1. risc-v may call bfd_elf_link_record_dynamic_symbol in the allocate_dynrelocs for not only undefweak symbols. 2. risc-v is missing the code to add RELATIVE to R_RISCV_GOT entries in the relocate_section if a symbol is not dynamic and is not undefined weak under pic and pie. If we call bfd_elf_link_record_dynamic_symbol, then the global symbol will be forced to dynamic, so the h->dynindx will forced to be a number rather than -1, even it should be -1. Once h->dynindx != -1 and pic/pie, it will go into finish_dynamic_symbol and insert RELATIVE/64 relocs for the got entry; For the above case there are two issues, 1. The global symbol _start is forced to be dynamic in the allocate_dynrelocs. when pie and all the referenced section are discarded, it won't go into relocate_section to initialize the got entry, so it will cause assert fail when adding RELATIVE reloc in the finish_dynamic_symbol. The assert fail represents another problem - if we don't initialize the got entry in the relocate_section under pie, which means we don't need to go into the finish_dynamic_symbol and don't need a RELATIVE reloc for the got entry, it should be NONE reloc. 2. Without linking any discarded section, it originally forces every RELATIVE relocs added for every got by the finish_dynamic_symbol. Even The final result looks correct under pie (genearte a RELATIVE reloc for got entry), not sure if it may cause other problems for some special cases, excpet the above one. Therefore, this patch try to fix the above assert fail, and also clarify the behavior of the allocate_dynrelocs which should only call bfd_elf_link_record_dynamic_symbol for undefweak symbols, and add the missing code to generate RELATIVE reloc to R_RISCV_GOT entries in the relocate_section if a symbol is not dynamic and is not undefined weak under pic and pie. Passed the gcc/binutils regressions of riscv-gnu-toolchain at least.
2025-07-21Remove NaCl/arm target supportH.J. Lu55-169/+60
NaCl has been deprecated: https://developer.chrome.com/docs/native-client/migration/ It is now in the process of being removed from llvm: https://github.com/llvm/llvm-project/pull/133661 Remove NaCl/arm target support from bfd, binutils, gas and ld. bfd/ * Makefile.am (BFD32_BACKENDS): Remove elf-nacl.lo. (BFD32_BACKENDS_CFILES): Remove elf-nacl.c. (SOURCE_HFILES): Remove elf-nacl.h. * Makefile.in: Regenerated. * config.bfd: Add *-*-nacl* to obsolete targets. Remove *-*-nacl* targets. * configure.ac: Remove nacl target vectors. * elf-bfd.h (elf_target_os): Remove is_nacl. * elf-nacl.c: Removed. * elf-nacl.h: Likewise. * elf32-arm.c: Don't include "elf-nacl.h". (elf32_arm_nacl_plt0_entry): Removed. (elf32_arm_nacl_plt_entry): Likewise. (elf32_arm_stub_long_branch_arm_nacl): Likewise. (elf32_arm_stub_long_branch_arm_nacl_pic): Likewise. (arm_movw_immediate): Likewise. (arm_movt_immediate): Likewise. (arm_nacl_put_plt0): Likewise. (elf32_arm_nacl_link_hash_table_create): Likewise. (elf32_arm_nacl_modify_segment_map): Likewise. (elf32_arm_nacl_final_write_processing): Likewise. (elf32_arm_nacl_plt_sym_val): Likewise. (elf32_arm_stub_cmse_branch_thumb_only): Remove long_branch_arm_nacl and long_branch_arm_nacl_pic entries. (arm_type_of_stub): Updated. (elf32_arm_create_or_find_stub_sec): Likewise. (arm_stub_required_alignment): Likewise. (elf32_arm_allocate_plt_entry): Likewise. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (elf32_arm_output_arch_local_syms): Likewise. Remove elf32_arm_nacl_bed. * targets.c: Remove NaCl target vectors. * bfd-in2.h: Regenerated. * configure: Likewise. * po/SRC-POTFILES.in: Likewise. binutils/ * NEWS: Mention NaCl target support removal. * testsuite/lib/binutils-common.exp: Remove NaCl target support. gas/ * NEWS: Mention NaCl target support removal. * configure.tgt: Likewise. * config/tc-arm.c: Remove NaCl target support. * testsuite/gas/arm/any-armv8m.d: Likewise. * testsuite/gas/arm/any-cmse-main.d: Likewise. * testsuite/gas/arm/any-cmse.d: Likewise. * testsuite/gas/arm/any-idiv.d: Likewise. * testsuite/gas/arm/arch4t-eabi.d: Likewise. * testsuite/gas/arm/arch4t.d: Likewise. * testsuite/gas/arm/armv8m.base-idiv.d: Likewise. * testsuite/gas/arm/armv9-a_arch.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-0.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-1.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-2.d: Likewise. * testsuite/gas/arm/attr-abi-hardfp-use-3.d: Likewise. * testsuite/gas/arm/attr-any-armv4t.d: Likewise. * testsuite/gas/arm/attr-any-thumbv6.d: Likewise. * testsuite/gas/arm/attr-arch-assumption.d: Likewise. * testsuite/gas/arm/attr-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-default.d: Likewise. * testsuite/gas/arm/attr-empty-string.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5-d16.d: Likewise. * testsuite/gas/arm/attr-ext-fpv5.d: Likewise. * testsuite/gas/arm/attr-ext-idiv.d: Likewise. * testsuite/gas/arm/attr-ext-mp.d: Likewise. * testsuite/gas/arm/attr-ext-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-neon-vfpv4.d: Likewise. * testsuite/gas/arm/attr-ext-sec.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3-fp16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv3xd.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: Likewise. * testsuite/gas/arm/attr-ext-vfpv4.d: Likewise. * testsuite/gas/arm/attr-march-all.d: Likewise. * testsuite/gas/arm/attr-march-armv1.d: Likewise. * testsuite/gas/arm/attr-march-armv2.d: Likewise. * testsuite/gas/arm/attr-march-armv2a.d: Likewise. * testsuite/gas/arm/attr-march-armv2s.d: Likewise. * testsuite/gas/arm/attr-march-armv3.d: Likewise. * testsuite/gas/arm/attr-march-armv3m.d: Likewise. * testsuite/gas/arm/attr-march-armv4.d: Likewise. * testsuite/gas/arm/attr-march-armv4t.d: Likewise. * testsuite/gas/arm/attr-march-armv4txm.d: Likewise. * testsuite/gas/arm/attr-march-armv4xm.d: Likewise. * testsuite/gas/arm/attr-march-armv5.d: Likewise. * testsuite/gas/arm/attr-march-armv5t.d: Likewise. * testsuite/gas/arm/attr-march-armv5te.d: Likewise. * testsuite/gas/arm/attr-march-armv5tej.d: Likewise. * testsuite/gas/arm/attr-march-armv5texp.d: Likewise. * testsuite/gas/arm/attr-march-armv5txm.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * testsuite/gas/arm/attr-march-armv6-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6.d: Likewise. * testsuite/gas/arm/attr-march-armv6j.d: Likewise. * testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv6k.d: Likewise. * testsuite/gas/arm/attr-march-armv6kt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6kz.d: Likewise. * testsuite/gas/arm/attr-march-armv6kzt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * testsuite/gas/arm/attr-march-armv6t2.d: Likewise. * testsuite/gas/arm/attr-march-armv6z.d: Likewise. * testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+idiv.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * testsuite/gas/arm/attr-march-armv7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv7-m.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * testsuite/gas/arm/attr-march-armv7-r.d: Likewise. * testsuite/gas/arm/attr-march-armv7.d: Likewise. * testsuite/gas/arm/attr-march-armv7a.d: Likewise. * testsuite/gas/arm/attr-march-armv7em.d: Likewise. * testsuite/gas/arm/attr-march-armv7m.d: Likewise. * testsuite/gas/arm/attr-march-armv7r.d: Likewise. * testsuite/gas/arm/attr-march-armv7ve.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+rdma.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+crypto.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+fp.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8-r.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-a+simd.d: Likewise. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_6-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_7-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_8-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8_9-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_1-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_2-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_3-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_4-a.d: Likewise. * testsuite/gas/arm/attr-march-armv9_5-a.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.base.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt.d: Likewise. * testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/attr-march-xscale.d: Likewise. * testsuite/gas/arm/attr-mcpu.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * testsuite/gas/arm/attr-names.d: Likewise. * testsuite/gas/arm/attr-non-null-terminated-string.d: Likewise. * testsuite/gas/arm/attr-order.d: Likewise. * testsuite/gas/arm/attr-override-cpu-directive.d: Likewise. * testsuite/gas/arm/attr-override-mcpu.d: Likewise. * testsuite/gas/arm/bl-local-2.d: Likewise. * testsuite/gas/arm/bl-local-v4t.d: Likewise. * testsuite/gas/arm/blx-local.d: Likewise. * testsuite/gas/arm/branch-reloc.d: Likewise. * testsuite/gas/arm/directives.d: Likewise. * testsuite/gas/arm/got_prel.d: Likewise. * testsuite/gas/arm/mapdir.d: Likewise. * testsuite/gas/arm/mapmisc.d: Likewise. * testsuite/gas/arm/mapsecs.d: Likewise. * testsuite/gas/arm/mapshort-eabi.d: Likewise. * testsuite/gas/arm/mov-highregs-any.d: Likewise. * testsuite/gas/arm/mov-lowregs-any.d: Likewise. * testsuite/gas/arm/note-march-armv2.d: Likewise. * testsuite/gas/arm/note-march-armv2a.d: Likewise. * testsuite/gas/arm/note-march-armv3.d: Likewise. * testsuite/gas/arm/note-march-armv3m.d: Likewise. * testsuite/gas/arm/note-march-armv4.d: Likewise. * testsuite/gas/arm/note-march-armv4t.d: Likewise. * testsuite/gas/arm/note-march-armv5.d: Likewise. * testsuite/gas/arm/note-march-armv5t.d: Likewise. * testsuite/gas/arm/note-march-armv5te.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt.d: Likewise. * testsuite/gas/arm/note-march-iwmmxt2.d: Likewise. * testsuite/gas/arm/note-march-xscale.d: Likewise. * testsuite/gas/arm/pr12198-1.d: Likewise. * testsuite/gas/arm/pr12198-2.d: Likewise. * testsuite/gas/arm/thumb-eabi.d: Likewise. * testsuite/gas/arm/thumb.d: Likewise. * testsuite/gas/arm/thumbrel.d: Likewise. * config/te-nacl.h: Removed. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Remove earmelf_nacl.c and and earmelfb_nacl.c. Remove NaCl dep files. * NEWS: Mention NaCl target support removal. * configure.tgt: Remove NaCl target support. * Makefile.in: Regenerated. * configure: Likewise. * po/BLD-POTFILES.in: Likewise. * emulparams/armelf_nacl.sh: Removed. * emulparams/armelfb_nacl.sh: Likewise. * emulparams/elf_nacl.sh: Likewise. * testsuite/ld-arm/farcall-arm-nacl-pic.d: Likewise. * testsuite/ld-arm/farcall-arm-nacl.d: Likewise. * testsuite/ld-arm/farcall-data-nacl.d: Likewise. * testsuite/ld-arm/farcall-thumb2-purecode-consecutive-veneer.d: Adjusted. * testsuite/ld-arm/arm-elf.exp: Remove NaCl target support. * testsuite/ld-arm/cortex-a8-far.d: Likewise. * testsuite/ld-arm/non-contiguous-arm3.d: Likewise. * testsuite/ld-arm/non-contiguous-arm6.d: Likewise. * testsuite/ld-elf/binutils.exp: Likewise. * testsuite/ld-elf/build-id.exp: Likewise. * testsuite/ld-elf/ehdr_start-missing.d: Likewise. * testsuite/ld-elf/ehdr_start-shared.d: Likewise. * testsuite/ld-elf/ehdr_start-userdef.d: Likewise. * testsuite/ld-elf/ehdr_start-weak.d: Likewise. * testsuite/ld-elf/ehdr_start.d: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/export-class.exp: Likewise. * testsuite/ld-elf/fatal-warnings-1a.d: Likewise. * testsuite/ld-elf/fatal-warnings-1b.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/package-note.exp: Likewise. * testsuite/ld-elf/pr16322.d: Likewise. * testsuite/ld-elf/pr16498a.d: Likewise. * testsuite/ld-elf/pr16498b.d: Likewise. * testsuite/ld-elf/pr19162.d: Likewise. * testsuite/ld-elf/pr22269a.d: Likewise. * testsuite/ld-elf/pr22269b.d: Likewise. * testsuite/ld-elf/pr22393-1a.d: Likewise. * testsuite/ld-elf/pr22393-1b.d: Likewise. * testsuite/ld-elf/pr22393-1c.d: Likewise. * testsuite/ld-elf/pr22393-1d.d: Likewise. * testsuite/ld-elf/pr22393-1e.d: Likewise. * testsuite/ld-elf/pr22393-1f.d: Likewise. * testsuite/ld-elf/pr22393-2a.rd: Likewise. * testsuite/ld-elf/pr22393-2b.rd: Likewise. * testsuite/ld-elf/pr23900-1-32.rd: Likewise. * testsuite/ld-elf/pr23900-1-64.rd: Likewise. * testsuite/ld-elf/pr23900-1.d: Likewise. * testsuite/ld-elf/pr23900-2a.d: Likewise. * testsuite/ld-elf/pr23900-2b.d: Likewise. * testsuite/ld-elf/pr30508.d: Likewise. * testsuite/ld-elf/pr30907-1.d: Likewise. * testsuite/ld-elf/pr30907-2.d: Likewise. * testsuite/ld-elf/pr32341.d: Likewise. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-elf/tls.exp: Likewise. * testsuite/ld-elf/tls_common.exp: Likewise. * testsuite/ld-elfvers/vers.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-elfweak/elfweak.exp: Likewise. * testsuite/ld-gc/gc.exp: Likewise. * testsuite/ld-ifunc/binutils.exp: Likewise. * testsuite/ld-pie/pie.exp: Likewise. * testsuite/ld-plugin/lto-binutils.exp: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-scripts/rgn-at3.d: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-size/size.exp: Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-19Re: RELOC_AGAINST_DISCARDED_SECTION zero size reloc sectionsAlan Modra2-1/+14
Update the testsuite, so that is_generic ELF targets still do the linkonce1 test (as linkonce3).
2025-07-19RELOC_AGAINST_DISCARDED_SECTION zero size reloc sectionsAlan Modra1-3/+2
For some reason the initial implementation (commit 0672748ac053) of this macro didn't allow discarding of all relocs in a section, perhaps because doing so would require a testsuite change. This patch allows zero size relocation sections to result, and adjusts the testsuite. i386, x86_64, ppc and ppc64 code that avoids a memmove is also changed to allow zero size reloc sections, and arc fixed to actually adjust the reloc section header.
2025-07-18ld: Limit PR ld/25617 tests to glibc targetsH.J. Lu1-1/+1
Since PR ld/25617 tests expects glibc specific features, limit PR ld/25617 tests to glibc targets. PR ld/33169 * testsuite/ld-elf/no-section-header.exp: Return if not glibc targets. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-15x86-64: Remove sframe relocs against discarded sectionsH.J. Lu1-1/+6
Since unlike eh_frame editing code, sframe editing code keeps R_X86_64_NONE reloc as is, its r_offset is wrong, we must not generate R_X86_64_NONE reloc in sframe section against discarded sections for "ld -r". bfd/ PR ld/33156 * elf64-x86-64.c (elf_x86_64_relocate_section): Also remove sframe relocations against discarded sections for "ld -r". ld/ PR ld/33156 * testsuite/ld-elf/eh-group.exp (as_gsframe): New. Assemble eh-group.o with $as_gsframe. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-15sframe: Allow input R_*_NONE relocationsH.J. Lu3-0/+59
"ld -r" generates R_*_NONE relocations in sframe section if input relocations in sframe section are against discarded section. Allow input R_*_NONE relocations if there are more relocation entries than SFrame entries, instead of assuming number of SFrame entries == number of relocation entries. bfd/ PR ld/33127 * elf-sframe.c (sframe_decoder_init_func_bfdinfo): Allow input R_*_NONE relocations if there are more relocation entries than SFrame entries. ld/ PR ld/33127 * testsuite/ld-x86-64/sframe-reloc-2a.s: New file. * testsuite/ld-x86-64/sframe-reloc-2b.s: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/33127 tests. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-14ld: Clear map_head_is_link_order for .gnu_object_onlyH.J. Lu1-2/+7
Clear map_head_is_link_order when generating .gnu_object_only section so that lang_add_section can add new sections and .sframe sections will be properly merged by _bfd_elf_merge_section_sframe. PR ld/33146 * ldlang.c (cmdline_emit_object_only_section): Clear map_head_is_link_order. * testsuite/ld-plugin/lto.exp (as_gsframe): New. (lto_link_tests): Add $as_gsframe to compile lto-4b.o and lto-4c.o. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-14Re: gas: Move gas_sframe_check to binutils-common.expAlan Modra1-31/+1
PR ld/33146 Correct TCL errors trying to access error output file in commit ef7a634dc01d. In fact, get rid of the output file test entirely since gas exit status is sufficient. Also there is no need to firstly check for ELF support. Set check_as_sframe_result, and remove ld-lib.exp check_as_sframe.
2025-07-12ld/aarch64elf: add support for DT_AARCH64_MEMTAG_STACK dynamic tagIndu Bhagat2-0/+8
Add new command line option -z memtag-stack for aarch64 elf. This option instructs the linker to generate the necessary dynamic tag DT_AARCH64_MEMTAG_STACK, which the dynamic loader can then use to protect the stack memory with PROT_MTE. Linker issues an 'unrecognized option' error when -z memtag-stack is specified for non-aarch64 based emulations. readelf displays the dynamic tag when present: $ readelf -d <exectutable> Dynamic section at offset 0xfdd8 contains XX entries: Tag Type Name/Value 0x0000000000000001 (NEEDED) Shared library: [libc.so.6] 0x000000000000000c (INIT) 0x400520 0x000000000000000d (FINI) 0x400b64 0x0000000000000019 (INIT_ARRAY) 0x41fdc8 ... ... ... 0x000000007000000c (AARCH64_MEMTAG_STACK) 0x1 ... ... ... ChangeLog: * bfd/elfnn-aarch64.c (elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_STACK dynamic tag. * bfd/elfxx-aarch64.h (struct aarch64_memtag_opts): Add new member for tracking whether stack access uses MTE insns. * binutils/readelf.c (get_aarch64_dynamic_type): Handle DT_AARCH64_MEMTAG_STACK. * ld/emultempl/aarch64elf.em: Add new command line option. * ld/ld.texi: Add documentation for -z memtag-stack. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * ld/testsuite/ld-aarch64/dt-memtag-stack.d: New test. include/ChangeLog: * elf/aarch64.h (DT_AARCH64_MEMTAG_STACK): New definition.
2025-07-12ld/aarch64elf: add support for DT_AARCH64_MEMTAG_MODE dynamic tagIndu Bhagat3-0/+15
Add new command line option -z memtag-mode=<mode> to aarch64 elf, where <mode> can be one of none, sync, or async. For mode of sync or async, a DT_AARCH64_MEMTAG_MODE dynamic tag with a value of 0 or 1 respectively is emitted. readelf displays the dynamic tag when present: $ readelf -d <exectutable> Dynamic section at offset 0xfdd8 contains XX entries: Tag Type Name/Value 0x0000000000000001 (NEEDED) Shared library: [libc.so.6] 0x000000000000000c (INIT) 0x400520 0x000000000000000d (FINI) 0x400b64 0x0000000000000019 (INIT_ARRAY) 0x41fdc8 ... ... ... 0x0000000070000009 (AARCH64_MEMTAG_MODE) 0x1 ... ... ... Note that this patch doesn't add support for the "asymm" MTE mode, which is an Armv8.7 extension. ChangeLog: * bfd/elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Add new member for memtag properties. (bfd_elfNN_aarch64_set_options): New argument to pass memtag properties. (elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_MODE dynamic tag. * bfd/elfxx-aarch64.h: New definition for the various memtag properties. * binutils/readelf.c (get_aarch64_dynamic_type): Handle DT_AARCH64_MEMTAG_MODE. * ld/emultempl/aarch64elf.em: Likewise. * ld/ld.texi: Add documentation for the new option -z memtag-mode. * ld/testsuite/ld-aarch64/aarch64-elf.exp: New test. * ld/testsuite/ld-aarch64/dt-memtag.d: New test. * ld/testsuite/ld-aarch64/dt-memtag-mode.s: New test. include/ChangeLog: * elf/aarch64.h (DT_AARCH64_MEMTAG_MODE): New definition.
2025-07-12ld: aarch64: make EH Frame parsing aware of augmentation char 'G'Indu Bhagat4-0/+70
As per the DWARF for the Arm 64-bit Architecture (AArch64) specification, the augmentation char 'G' indicates that associated frames may modify MTE tags on the stack space they use. Add knowledge of the 'G' augmentation char to the EH Frame parsing code. ChangeLog: * bfd/elf-eh-frame.c (_bfd_elf_parse_eh_frame): Accommodate augmentation char 'G'. * ld/testsuite/ld-aarch64/aarch64-elf.exp: New test. * ld/testsuite/ld-aarch64/mte-tagged-frame-bar.s: New test. * ld/testsuite/ld-aarch64/mte-tagged-frame-foo.s: New test. * ld/testsuite/ld-aarch64/mte-tagged-frame.d: New test.
2025-07-12LoongArch: Un-skip cross-segment alignment compensation during relax pass 2WANG Xuerui1-0/+1
It turned out wrong to skip compensating for segment alignment if the current section is closed for deletion, as my recent system update with binutils trunk revealed link failures of many high-profile packages such as ffmpeg, numpy and wxGTK -- the dreaded "relocation truncated to fit" errors regarding improperly produced R_LARCH_PCREL20_S2. As it's near 2.45 branching time, revert the problematic change and XFAIL the original test case for now. Suggested-by: Xi Ruoyao <xry111@xry111.site> Signed-off-by: WANG Xuerui <git@xen0n.name>
2025-07-12MIPS: Fix linker for REL TLS HI16/LO16 relocsAlan Modra9-0/+145
With REL targets TLS HI16/LO16 relocations need to combine the low part with the high part just as all the remaining HI16/LO16 relocations, so as to determine the borrow in calculation correctly. 2025-07-12 Alan Modra <amodra@gmail.com> bfd/ PR 19977 * elfxx-mips.c (tls_hi16_reloc_p): New function. (mips_elf_add_lo16_rel_addend): Handle tls relocs. (_bfd_mips_elf_relocate_section): Likewise. 2025-07-12 Maciej W. Rozycki <macro@orcam.me.uk> ld/ PR 19977 * testsuite/ld-mips-elf/pr19977.d: New test. * testsuite/ld-mips-elf/pr19977-mips16.d: New test. * testsuite/ld-mips-elf/pr19977-micromips.d: New test. * testsuite/ld-mips-elf/pr19977-r.d: New test. * testsuite/ld-mips-elf/pr19977-r-mips16.d: New test. * testsuite/ld-mips-elf/pr19977-r-micromips.d: New test. * testsuite/ld-mips-elf/pr19977-r.s: New test source. * testsuite/ld-mips-elf/pr19977.ld: New test linker script. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2025-07-12PR 19977: MIPS: Add missing pairing for REL PCHI/PCLO relocationsMaciej W. Rozycki4-0/+73
Just as with all HI/LO 16-bit partial relocations the newly-introduced MIPSr6 PC-relative R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations require pairing for correct borrow propagation from the low part to the high part with REL targets, another case for PR 19977. Unlike with absolute relocation, there is a complication here in that both parts represent a calculation that is relative to the PC at the individual relocation's location rather than both referring to the location of the R_MIPS_PCHI16 relocation, normally applied to an AUIPC instruction, the location of which is used for the run-time calculation executed by hardware. To take this semantics into account, the addend of the R_MIPS_PCLO16 relocation matching a given R_MIPS_PCHI16 relocation is expected to be adjusted in the source assembly file for the distance between the two relocations in a single pair, so that once both relocations have been calculated by the linker, the expression calculated at run time is such as if the combined 32-bit immediate was added at the location of the AUIPC instruction. So for matching R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations into pairs GAS needs to check for the distance between the two relocations to be equal to the difference between the addends supplied, and then the linker has to subtract the low part of the distance between the two relocations from the low part in calculating the high part, so as to factor in any borrow. A further complication is that `_bfd_mips_elf_lo16_reloc' handler is supplied with the addend differently depending on whether it has been called by GAS via `bfd_install_relocation', or by the generic linker via `bfd_perform_relocation'. In the former case the addend is supplied with the relocation itself while in the latter one it comes from the field being relocated. We currently ignore the addend supplied with the relocation and it works for calculating absolute high-part relocations, because the same addend has been previously supplied with them when `_bfd_mips_elf_hi16_reloc' was called, however this approach does not work for the PC-relative case because as noted above the low-part addend is different and we need to consistently apply the distance adjustment both with GAS and LD. Since the supplied addend and one retrieved from field being relocated won't ever be both nonzero, just use the sum of the two values. The low-part addend in `mips_elf_add_lo16_rel_addend' always comes from the field being relocated, so there's no complication there, we just need to apply the same adjustment. New linker test cases verify that the same ultimate machine code is produced both for ELF and S-record output formats, ensuring that the both the MIPS/ELF linker and the generic linker behave in the correct way, consistent with each other.
2025-07-12MIPS/LD/testsuite: Remove duplicate HI/LO relocation test dump filesMaciej W. Rozycki20-79/+25
There are only nonessential differences between corresponding o32 and n32 HI/LO relocation test dump files, so reduce the number of files by reusing the same dump between the two ABIs. Adjust test naming, also for the n64 ABI, for consistency with other tests.
2025-07-11s390: Add SFrame stack trace information for .plt sectionJens Remus3-4/+35
Enable SFrame stack tracing through PLT entries. Based on x86-64. On s390x both PLT0 and PLTn entries are 32-bytes in size. Their code neither alters the stack pointer (SP), frame pointer (FP), nor return address (RA) registers. Therefore the PLT0 can be represented using a SFrame FDE of type PCINC with a single SFrame FRE and the PLTn can be represented using a SFrame FDE of type PCMASK, with a repetition block size of 32 (PLTn size), and a single SFrame FRE. Note that as both the PLT0 entry and the PLTn entries have equal size and could both be represented using the identical SFrame FRE, the whole .plt section on s390x could be represented using a single SFrame FDE of type PCMASK, with a repetition block size of 32 (PLT0 and PLTn size), and a single SFrame FRE. Keep the x86-64 logic with separate SFrame FDEs for PLT0 and PLTn, to ease potential generalization of the .sframe for .plt generation logic among architectures. bfd/ * elf64-s390.c: Include sframe.h and sframe-api.h. (PLT_SFRAME_FDE_START_OFFSET, SFRAME_PLT0_MAX_NUM_FRES, SFRAME_PLTN_MAX_NUM_FRES, elf_s390x_sframe_plt_fre, elf_s390x_sframe_plt): New .sframe template for .plt section. (elf_s390_link_hash_table): Add plt_cfe_ctx, plt_sframe, and sframe_plt fields. (_bfd_s390_elf_create_sframe_plt): New function. Fill in .sframe section for .plt section. (_bfd_s390_elf_write_sframe_plt): New function. Write .sframe section. (elf_s390_create_dynamic_sections): Create .sframe section for .plt section. (elf_s390_late_size_sections): Call _bfd_s390_elf_create_sframe_plt and _bfd_s390_elf_write_sframe_plt. (elf_s390_finish_dynamic_sections): Write .plt section start into .sframe FDE covering .plt section. Call _bfd_elf_merge_section_sframe on htab->plt_sframe. ld/ * NEWS: Add news entry. ld/testsuite/ * ld-s390/s390.exp: Add new test. * ld-s390/sframe-plt-1.d: New linker-generated .sframe for .plt test. * ld-s390/sframe-simple-1.d: Adjust expected test output due to linker-generated .sframe for .plt. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2025-07-11s390: Initial support to generate .sframe from CFI directives in assemblerJens Remus4-0/+65
This introduces initial support to generate .sframe from CFI directives in assembler on s390 64-bit (s390x). Due to SFrame V2 format limitations it has the following limitations, some of them getting addressed by subsequent patches, which cause generation of SFrame FDE to be skipped: - SFrame FP/RA tracking only supports register contents being saved on the stack (i.e. .cfi_offset). It does not support FP/RA register contents being saved in other registers (i.e. .cfi_register). GCC on s390x can be observed to save the FP/RA register contents in floating- point registers, but only in leaf functions. This issue is detailed further and resolved in the subsequent commit "s390: Represent FP/RA saved in register in SFrame". - SFrame FP/RA tracking cannot represent FP without RA saved. This is because the format assumes SFrame FDE offset2 to be the RA offset, if there are two offsets, and offset3 to be the FP offset, if there are three offsets. There is no mean to distinguish whether offset2 is the RA or FP offset, if there are only two offsets. This issue is detailed further and resolved in the subsequent commit "s390: Represent FP without RA saved in SFrame". - SFrame assumes a dedicated FP register number. The s390x ELF ABI [1] does only designate register 11 as preferred FP register number. In general GCC and Clang on s390x use register 11 as frame pointer. GCC on s390x can be observed to use register 14 as frame pointer in the stack clash protector in the function prologue. glibc on s390x contains hand-written assembler code that uses register 12 as frame pointer. This s390x support is largely based on the AArch64 support from commit b52c4ee46657 ("gas: generate .sframe from CFI directives"). The SFrame ABI/arch identifier SFRAME_ABI_S390X_ENDIAN_BIG is introduced for s390x and added to the SFrame format specification. The s390x ELF ABI [1] specifies the following C calling conventions for s390x architecture: - Register 15 is the stack pointer (SP). - Register 14 contains the return address (RA) at function entry. - There is no dedicated frame pointer register. Register 11 is the preferred frame pointer (FP). [2] GCC and Clang in general use register 11 as frame pointer. - The CFA is defined as SP at call site +160. [3] The SP at call site can therefore be derived from the CFA using a SP value offset from CFA of -160. The s390x ELF ABI [1] does not assign any standard save slot to each register in the register save area of a stack frame. Neither the return address (RA, r14) nor preferred frame pointer (FP, r11) necessarily need to be saved. Therefore SFrame RA and FP tracking is used. Support for SFrame on s390 is only enabled for the 64-bit s390x ELF ABI (z/Architecture with 64-bit addressing mode). It is disabled for the 32-bit s390 ELF ABI (ESA/390 or z/Architecture with 32-bit addressing mode). s390x-specific SFrame assembler and linker tests are added, including error tests for use of a non-preferred frame pointer (FP) register and specification of a non-default return address (RA) register. [1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases [2]: s390x ELF ABI, commit f00421825979 ("Add information about the frame pointer register"), https://github.com/IBM/s390x-abi/commit/f00421825979 [3]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"), https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88 include/ * sframe.h: Add reference to s390x architecture in comments. (SFRAME_ABI_S390X_ENDIAN_BIG): Define SFrame ABI/arch identifier for s390x. (SFRAME_S390X_SP_VAL_OFFSET): Define s390x-specific SP value offset from CFA. libsframe/ * sframe.c (need_swapping): Add SFRAME_ABI_S390X_ENDIAN_BIG. * doc/sframe-spec.texi (SFRAME_ABI_S390X_ENDIAN_BIG, s390x, SFRAME_S390X_SP_VAL_OFFSET): Document SFrame ABI/arch identifier for s390x, add references to s390x architecture, and document s390x-specifics, such as the SP value offset from CFA of -160. gas/ * config/tc-s390.h: s390x support to generate .sframe from CFI directives in assembler. (support_sframe_p): Define. (SFRAME_CFA_SP_REG, SFRAME_CFA_FP_REG, SFRAME_CFA_RA_REG): Define. (sframe_ra_tracking_p): Define. (sframe_cfa_ra_offset): Define. (sframe_get_abi_arch): Define. * config/tc-s390.c: s390x support to generate .sframe from CFI directives in assembler. (s390_sframe_cfa_sp_reg, s390_sframe_cfa_fp_reg, s390_sframe_cfa_ra_reg): New. Initialize to DWARF register numbers of stack pointer (SP, r15), preferred frame pointer (FP, r11), and return address (RA, r14) registers. (s390_support_sframe_p): New function. Return true if s390x. (s390_sframe_ra_tracking_p): New function. Return true. (s390_sframe_cfa_ra_offset): New function. Return SFRAME_CFA_FIXED_RA_INVALID. (s390_sframe_get_abi_arch): New function. Return SFRAME_ABI_S390X_ENDIAN_BIG if s390x, otherwise zero. * gen-sframe.c: Add reference to s390x architecture in comments. (sframe_xlate_do_val_offset): Add support for s390x-specific SFRAME_S390X_SP_VAL_OFFSET. * NEWS: Add news entry. gas/testsuite/ * gas/cfi-sframe/cfi-sframe.exp: Enable common SFrame tests for s390x. Add s390x-specific SFrame (error) tests. * gas/cfi-sframe/cfi-sframe-s390x-1.d: New s390x-specific SFrame test. * gas/cfi-sframe/cfi-sframe-s390x-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-2.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-1.d: New s390x-specific SFrame error test that uses a non-default frame-pointer register as CFA base register. * gas/cfi-sframe/cfi-sframe-s390x-err-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-2.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-err-3.d: New s390x-specific SFrame error test that uses a non-default return address register. * gas/cfi-sframe/cfi-sframe-s390x-err-3.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.d: New s390x- specific SFrame test that saves RA and FP individually on the stack. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: New s390x-specific SFrame error test that saves FP and RA individually, to trigger FP without RA saved. * gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: New s390x-specific SFrame error test that saves FP and RA individually in registers. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s: Likewise. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d: New s390x-specific SFrame error test that saves RA and FP individually in registers. * gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s: Likewise. ld/testsuite/ * ld-s390/s390.exp: Add simple SFrame test. * ld-s390/sframe-simple-1.d: New simple SFrame test. * ld-s390/sframe-bar.s: Likewise. * ld-s390/sframe-foo.s: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2025-07-11s390: Explicitly list linker dump testsJens Remus1-9/+6
Generating the linker dump test list using file globbing makes it difficult to exclude specific tests under certain circumstances. List them explicitly instead. This enables to add tests in the future that can be excluded. While at it reorganize how s390 linker tests get run for s390x. ld/testsuite/ * ld-s390/s390.exp: Reorganize and explicitly list linker dump tests. Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2025-07-08RISC-V: Bind defined symbol locally in PIELinsen Zhou5-0/+36
Reference commit 1dcb9720d62cd053a72c31881b7724ce9f74332c bfd/ * elfnn-riscv.c (RISCV_COPY_INPUT_RELOC): Bind defined symbol locally in PIE. ld/ * testsuite/ld-riscv-elf/pie-bind-locally-a.s: New test source. * testsuite/ld-riscv-elf/pie-bind-locally-b.s: Likewise. * testsuite/ld-riscv-elf/pie-bind-locally-rv32.d: New testcase. * testsuite/ld-riscv-elf/pie-bind-locally-rv64.d: Likewise. Signed-off-by: Linsen Zhou <i@lin.moe>
2025-07-07LoongArch: Allow to relax instructions into NOPs after handling alignmentWANG Xuerui3-0/+80
Right now, LoongArch linker relaxation is 2-pass, since after alignment is done, byte deletion can no longer happen. However, as the alignment pass also shrinks text sections, new relaxation chances may well be created after alignment is done. Although at this point we can no longer delete unused instructions without disturbing alignment, we can still replace them with NOPs; popular LoongArch micro-architectures can eliminate NOPs during execution, so we can expect a (very) slight performance improvement from those late-created relaxation chances. To achieve this, the number of relax passes is raised to 3 for LoongArch, and every relaxation handler except loongarch_relax_align is migrated to a new helper loongarch_relax_delete_or_nop, that either deletes bytes or fills the bytes to be "deleted" with NOPs, depending on whether the containing section already has undergone alignment. Also, since no byte can be deleted during this relax pass, in the pass the pending_delete_ops structure is no longer allocated, and loongarch_calc_relaxed_addr(x) degrades to the trivial "return x" in this case. In addition, previously when calculating distances to symbols, an extra segment alignment must be considered, because alignment may increase distance between sites. However in the newly added 3rd pass code size can no longer increase for "closed" sections, so we can skip the adjustment for them to allow for a few more relaxation chances. A simple way to roughly measure this change's effectiveness is to check how many pcalau12i + addi.d pairs are relaxed into pcaddi's. Taking a Firefox 140.0.2 test build of mine as an example: Before: 47842 pcaddi's in libxul.so After: 48089 This is a 0.5% increase, which is kind of acceptable for a peephole optimization like this; of which 9 are due to the "relax"ed symbol distance treatment. Signed-off-by: WANG Xuerui <git@xen0n.name>
2025-07-06ld: bfd: sframe: fix incorrect r_offset in RELA entriesIndu Bhagat2-0/+36
PR/32666 Incorrect .rela.sframe when using ld -r Input SFrame sections are merged using _bfd_elf_merge_section_sframe (), which clubs all SFrame FDEs together in one blob and all SFrame FREs in another. This, of course, means the offset of an SFrame FDE in the output section cannot be simply derived from the output_offset of the sections. Fix this by providing _bfd_elf_sframe_section_offset () which returns the new offset of the SFrame FDE in the merged SFrame section. Unlike EH_Frame sections, which also use the _bfd_elf_section_offset (), to update the r_offset, SFrame sections have distinct merging semantics. In case of SFrame, the SFrame FDE will not simply sit at location "sec->output_offset + offset of SFrame FDE in sec". Recall that information layout in an SFrame section is as follows: SFrame Header SFrame FDE 1 SFrame FDE 2 ... SFrame FDEn SFrame FREs (Frame Row Entries) Note how the SFrame FDEs and SFrame FREs are clubber together in groups of their own. Next, also note how the elf_link_input_bfd () does a: irela->r_offset += o->output_offset; This, however, needs to be avoided for SFrame sections because the placement of all FDEs is at the beginning of the section. So, rather than conditionalizing this as follows: if (o->sec_info_type != SEC_INFO_TYPE_SFRAME) irela->r_offset += o->output_offset; the implementation in _bfd_elf_sframe_section_offset () does a reverse adjustment, so that the generic parts of the linking process in elf_link_input_bfd () are not made to do SFrame specific adjustments. Add a new enum to track the current state of the SFrame input section during the linking process (SFRAME_SEC_DECODED, SFRAME_SEC_MERGED) for each input SFrame section. This is then used to assert an assumption that _bfd_elf_sframe_section_offset () is being used on an input SFrame sections which have not been merged (via _bfd_elf_merge_section_sframe ()) yet. bfd/ * elf-bfd.h: New declaration. * elf-sframe.c (_bfd_elf_sframe_section_offset): New definition. * elf.c (_bfd_elf_section_offset): Adjust offset if SFrame section. ld/testsuite/ * ld-x86-64/x86-64.exp: New test. * ld-x86-64/sframe-reloc-1.d: New test.
2025-07-06bfd: gas: ld: libsframe: adopt new encoding for FDE func start addr fieldIndu Bhagat6-6/+12
This patch convenes a set of changes in bfd, gas, ld, libsframe towards moving to the new encoding for the 'sfde_func_start_address' field in SFrame FDE. First, gas must now mark all SFrame sections with the new flag SFRAME_F_FDE_FUNC_START_PCREL. gas was already emitting the field in the said encoding. * gas/gen-sframe.c (output_sframe_internal): Emit the flag SFRAME_F_FDE_FUNC_START_PCREL. Similarly for ld, adopt the new semantics of sfde_func_start_address consistently. This means: - When merging SFrame sections, check that all input SFrame sections have the SFRAME_F_FDE_FUNC_START_PCREL flag set. If the check fails, ld errors out. - When merging SFrame sections, keep even the in-memory contents of the FDE function start address (buffer passed to libsframe sframe_encoder_write () for writing out) encoded in the new semantics. While it is, in theory, possible that instead of doing this change here, we adjust the value of sfde_func_start_address at the final write (sframe_encoder_write) time. But latter is not favorable for maintenanance and may be generally confusing for developers. - When creating SFrame for PLT entries, emit flag SFRAME_F_FDE_FUNC_START_PCREL. include/ * sframe-api.h (SFRAME_F_LD_MUSTHAVE_FLAGS): New definition. bfd/ * elf-sframe.c (_bfd_elf_merge_section_sframe): Check for flag combinatation SFRAME_F_LD_MUSTHAVE_FLAGS set for all input and output SFrame sections. If not, error out. Also, adopt the new semantics of function start address encoding. * bfd/elfxx-x86.c (_bfd_x86_elf_create_sframe_plt): Emit flag SFRAME_F_FDE_FUNC_START_PCREL. Next, for dumping SFrame sections, now that we are emitting the same encoding in GAS, non-relocatable and relocatable SFrame links, it is the time to set relocate to TRUE in debug_displays[]. binutils/ * dwarf.c (struct dwarf_section_display): Allow sframe sections to now be relocated. gas/testsuite/ * gas/cfi-sframe/cfi-sframe-aarch64-pac-ab-key-1.d: Update the test. Relocatable SFrame sections now display non-zero value (appropriate function start address). Now, as the SFrame sections on-disk and in-memory use the new semantics of sfde_func_start_address encoding (i.e., function start address is the offset from the sfde_func_start_address field to the start PC), the calculation to make it human readable (i.e., relatable to the addresses in .text sections) needs adjustment. libsframe/ * sframe-dump.c (dump_sframe_func_with_fres): Adjust the function start address for dumping. Now that both the emission of the new encoding, and the relocation of sections before dumping them is in place, it is time to adjust the testcases. gas/testsuite/ * gas/cfi-sframe/cfi-sframe-aarch64-1.d: Update expected output to include SFRAME_F_FDE_FUNC_START_PCREL instead of NONE. * gas/cfi-sframe/cfi-sframe-aarch64-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-aarch64-3.d: Likewise. * gas/cfi-sframe/cfi-sframe-aarch64-4.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-10.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-11.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-3.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-4.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-5.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-6.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-7.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-8.d: Likewise. * gas/cfi-sframe/cfi-sframe-common-9.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-1.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-2.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-3.d: Likewise. * gas/cfi-sframe/cfi-sframe-x86_64-empty-4.d: Likewise. * gas/cfi-sframe/common-empty-1.d: Likewise. * gas/cfi-sframe/common-empty-2.d: Likewise. * gas/cfi-sframe/common-empty-3.d: Likewise. * gas/scfi/x86_64/scfi-cfi-sections-1.d: Likewise. * gas/scfi/x86_64/scfi-dyn-stack-1.d: Likewise. ld/testsuite/ * ld-aarch64/sframe-simple-1.d: Update expected output to include SFRAME_F_FDE_FUNC_START_PCREL. * ld-x86-64/sframe-ibt-plt-1.d: Likewise. * ld-x86-64/sframe-plt-1.d: Likewise. * ld-x86-64/sframe-pltgot-1.d: Likewise. * ld-x86-64/sframe-pltgot-2.d: Likewise. * ld-x86-64/sframe-simple-1.d: Likewise. Naturally, the change of semantics for 'SFrame FDE function start address' has consequences on the implementation in libsframe. As per the new semantics: - Function start address in the SFrame FDE (sfde_func_start_address) is an offset from the FDE function start address field to the start PC of the associated function. Note that, the libsframe library brings the SFrame section contents into its own memory to create a sframe_decoder_ctx object via sframe_decode (). Many internal and user-interfacing APIs then may use sframe_decoder_ctx object to interact and fulfill the work. In context of changing semantics for sfde_func_start_address, following relevant examples may help understand the impact: - sframe_find_fre () finds a the SFrame stack trace data (SFrame FRE) given a lookup offset (offset of lookup_pc from the start of SFrame section). Now that the sfde_func_start_address includes the distance from the sfde_func_start_address field to the start of SFrame section itself, the comparison checks of sfde_func_start_address with the incoming lookup offset need adjustment. - Some internal functions (sframe_get_funcdesc_with_addr_internal () finds SFrame FDE by using binary seach comparing sfde_func_start_address fields, etc.) need adjustments. - sframe_encoder_write () sorts the SFrame FDEs before writing out the SFrame data. Sorting of SFrame FDE via the internal function sframe_sort_funcdesc() needs adjustments: the new encoding of sfde_func_start_address means the distances are not from the same anchor, so cannot be sorted directly. This patch takes the approach of adding a new internal function: - sframe_decoder_get_secrel_func_start_addr (): This function returns the offset of the start PC of the function from the start of SFrame section, i.e., it gives a section-relative offset. As the sframe_decoder_get_secrel_func_start_addr () API needs the value of the function index in the FDE list, another internal API needs sframe_fre_check_range_p () adjustments too. Sorting the FDEs (via sframe_sort_funcdesc ()) is done by first bringing all offsets in sfde_func_start_address relative to start of SFrame section, followed by sorting, and then readjusting the offsets accroding to the new position in the FDE list. libsframe/ * sframe.c (sframe_decoder_get_secrel_func_start_addr): New static function. (sframe_fre_check_range_p): Adjust the interface a bit. (sframe_get_funcdesc_with_addr_internal): Use sframe_decoder_get_secrel_func_start_addr () when comparing sfde_func_start_address with user input offset. (sframe_find_fre): Adopt the new semantics. (sframe_sort_funcdesc): Likewise. For the libsframe testsuite, use the new encoding for FDE func start addr: distance between the FDE sfde_func_start_address field and the start PC of the function itself. Use SFRAME_F_FDE_FUNC_START_PCREL flag, though the sframe_encode () interface in libsframe applies no sanity checks for the encoding itself. libsframe/testsuite/ * libsframe.find/findfre-1.c: Adjust to use the new SFRAME_F_FDE_FUNC_START_PCREL specific encoding. * libsframe.find/findfunc-1.c: Likewise. * libsframe.find/plt-findfre-1.c: Likewise. * libsframe/testsuite/libsframe.decode/DATA2: Update data file due to usage of new SFRAME_F_FDE_FUNC_START_PCREL flag. * libsframe/testsuite/libsframe.encode/encode-1.c: Use flag SFRAME_F_FDE_FUNC_START_PCREL.
2025-07-06MIPS/LD/testsuite: Remove empty pic-and-nonpic-1-r6.s fileMaciej W. Rozycki1-0/+0
It was never used, pushed by mistake along with pic-and-nonpic-1a-r6.s.
2025-07-06MIPS/BFD: Fix RELA handling of borrow in the generic linkerMaciej W. Rozycki17-12/+111
Fix an issue with `_bfd_mips_elf_generic_reloc' not taking into account any borrow from the lower part in the handling of relocations of the HI/LO kind and resulting in incorrect calculations made for RELA targets in the generic used for non-ELF output such as S-records. This doesn't trigger for REL targets because they call `_bfd_mips_elf_generic_reloc' indirectly from `_bfd_mips_elf_lo16_reloc' so as to obtain a complete 32-bit addend from relocation pairs and in calculating the addend the latter function uses a hack to work around the lack of borrow handling in the former function. The MIPS/ELF linker is unaffected as it uses its own calculations. Correct the calculation of the relevant partial relocations made in `_bfd_mips_elf_generic_reloc' then to take the borrow into account and remove the hack from `_bfd_mips_elf_lo16_reloc' as no longer needed. Add generic linker test cases accordingly expecting the same disassembly from srec output produced as from ELF output produced by the MIPS/ELF linker.
2025-07-06MIPS/testsuite: Expand GAS and LD HI/LO relocation coverageMaciej W. Rozycki14-17/+2059
Expand test coverage for HI/LO relocation handling and add conventional MIPS and microMIPS GAS tests as well as conventional MIPS, microMIPS, and MIPS16e2 LD tests, covering R_MIPS_HI16, R_MIPS_LO16, R_MIPS16_HI16, R_MIPS16_LO16, R_MICROMIPS_HI16, and R_MICROMIPS_LO16 relocations, as well as 64-bit R_MIPS_HIGHEST, R_MIPS_HIGHER, R_MICROMIPS_HIGHEST, and R_MICROMIPS_HIGHER relocations. Modify the linker script so as to retain the `.MIPS.abiflags' section so as to disassemble MIPS16e2 code correctly, as MIPS16e2 ASE information is only carried in that section and not in ELF file header's `e_flags'. MIPS16e2 and microMIPS code requires at least the MIPS32r2 ISA (or the MIPS64r2 one for the n32 and n64 ABIs), which is incompatible with the `mips:5900' linker output architecture and causes link failures such as: ./ld-new: tmpdir/mips-hilo1.o: linking mips:isa32r2 module with previous mips:5900 modules ./ld-new: failed to merge target specific data of file tmpdir/mips-hilo1.o Therefore exclude `mips*el-ps2-elf*' targets from microMIPS and MIPS16e2 LD testing.
2025-07-06MIPS/LD/testsuite: Switch mips16-hilo tests to new disassembly formatMaciej W. Rozycki2-327/+329
Switch the o32 and n32 mips16-hilo MIPS LD tests to the new disassembly format, to reduce discrepancies in output in preparation to reuse for generic linker tests. Taking the first line of disassembly output as an example the difference is: 00500000 <stuff> 6c00 li a0,0 vs: 0x0000000000500000 6c00 li a0,0 for ELF and srec input respectively with the currently used older format requested with `--prefix-addresses', but with the new disassembly format it is exactly the same between the two input formats and no information that we need is lost in the transition: 500000: 6c00 li a0,0
2025-07-06MIPS/LD/testsuite: Remove symbol table output from mips16-hilo testsMaciej W. Rozycki2-4/+2
The o32 and n32 mips16-hilo MIPS LD tests request symbol table output only to discard it in matching. The symbol table is not relevant to these tests, so remove it from output requested and adjust matching patterns accordingly.
2025-07-06MIPS/testsuite: Fix %hi usage across MIPS16 GAS/LD testsMaciej W. Rozycki1-2/+2
Fix a couple of places in MIPS GAS and LD R_MIPS16_HI16/R_MIPS16_LO16 relocation tests where the %hi operator has been incorrectly used, but the %lo operator is expected to complement the preceding %hi operation.
2025-07-06MIPS/LD/testsuite: Fix mips16-hilo IRIX 6 emulation failuresMaciej W. Rozycki2-25/+25
IRIX 6 emulations place external small common symbols in the regular common section instead of the small common section. With mips16-hilo test this leads to a different symbol assignment to memory locations between o32 and n32 ABIs, as follows: --- o32.map +++ n32.map @@ -46,23 +46,22 @@ *(.sdata) 0x00765430 . = 0x765430 -.bss 0x00765430 0x7d8 +.bss 0x00765430 0x7d9 *(.bss) .bss 0x00765430 0x3f0 tmpdir/mips16-hilo.o .bss 0x00765820 0x0 tmpdir/mips16-hilo1.o *(COMMON) - COMMON 0x00765820 0x3e8 tmpdir/mips16-hilo.o + COMMON 0x00765820 0x3e9 tmpdir/mips16-hilo.o 0x00765820 big_external_common + 0x00765c08 small_external_common -.sbss 0x00765c08 0x2 +.sbss 0x00765c09 0x1 *(.sbss) - .sbss 0x00765c08 0x1 tmpdir/mips16-hilo.o + .sbss 0x00765c09 0x1 tmpdir/mips16-hilo.o *(.scommon) - .scommon 0x00765c09 0x1 tmpdir/mips16-hilo.o - 0x00765c09 small_external_common /DISCARD/ *(*) LOAD tmpdir/mips16-hilo.o LOAD tmpdir/mips16-hilo1.o -OUTPUT(tmpdir/dump elf32-bigmips) +OUTPUT(tmpdir/dump elf32-nbigmips) which in turn causes a testsuite regression. Since the specific mapping of symbols does not matter for the scope of the test, reorder the small common section ahead of SBSS, so that the `small_external_common' symbol ends up in the same place regardless of whether via the regular common section or the small common section. Adjust embedded addresses in the disassembly expected accordingly, removing the regression concerned: mips-sgi-irix6 -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs n32 mips64el-ps2-elf -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs n32
2025-07-06MIPS/LD/testsuite: Unify o32/n32 mips16-hilo test outputMaciej W. Rozycki1-332/+1
The mips16-hilo MIPS LD test case is supposed to produce the same final linked output regardless of whether the o32 or n32 ABI has been chosen for assembly. Reuse o32 output for the n32 test then.
2025-07-06MIPS/LD/testsuite: Set architecture for MIPS16 HI/LO testsMaciej W. Rozycki3-2/+4
Remove regressions across MIPSr6 targets with the MIPS16 HI/LO tests, which are incompatible with the default architecture of these targets: mips-img-elf -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mips-img-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mips64-img-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mips64-img-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs n32 mips64el-img-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mips64el-img-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs n32 mipsel-img-elf -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsel-img-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa32r6-elf -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa32r6-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa32r6el-elf -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa32r6el-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa64r6-elf -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa64r6-linux-gnuabi64 -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa64r6-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa64r6el-elf -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa64r6el-linux-gnuabi64 -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs mipsisa64r6el-linux -FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs
2025-07-04cris/testsuite: don't use --em=Jan Beulich172-172/+172
Using such abbreviations is fine when written on an interactive command line by a human. In scripts and alike, doing so risks colliding with later option additions, as is about to occur for gas: Shortly there'll be --emit-local-absolute.
2025-06-24RISC-V: Fxied failed testsuites when building rv32-linuxNelson Chu6-6/+6
2025-06-24RISC-V: Support for unlabeled landing pad PLT generationKito Cheng3-0/+58
This patch adds support for generating unlabeled landing pad PLT entries for the RISC-V architecture. Unlabeled landing pad will place a LPAD instruction at the PLT entry and PLT header, also PLT header will have few changes due to the offset is different from the original one. Ref: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417
2025-06-24RISC-V: Implment the merge logic for GNU_PROPERTY_RISCV_FEATURE_1_ANDKito Cheng12-0/+164
GNU_PROPERTY_RISCV_FEATURE_1_AND will perform a bitwise AND operation on the properties of the input files.
2025-06-11Arm tests: reduce objdump's output and improve some matching patternsMatthieu Longo4-29/+14
Linker scripts can change the sections order in the output. Some matching patterns in tests try to detect the end of a section by detecting the beginning of the next one. However, they mistakenly enforce the name of the next section without any need. This caused the tests to break due to minor changes to the linker scripts. This patch adds '-j <interesting-section>' to the arguments of objdump to dump only relevant information for the tests. This removed the issue related to the ordering of the sections. The matching patterns were also made stricter to match better the expected output.
2025-06-11AArch64 variant PCS tests: remove RWX permissions on segmentsMatthieu Longo4-114/+124
The symbols of variant PCS functions require special handling. The variant PCS tests check both the relocation information and the markings in the symbol table. Those tests dump a lot of addresses, so a custom linker script, variant_pcs.ld was used to control reliably the addresses of the sections. However, the linker script does not provide information enough to the linker to assess the right set of permisssions on segments (i.e. Read/Write/Execute). This insufficiency caused the linker to bundle all the sections in a same segment with the union of all the required permissions, i.e. RWX. A segment with such lax permissions constitutes a security hole, so the linker emits the following warning message: <ELF file> has a LOAD segment with RWX permissions. This warning message is noisy in the tests, and has no reason to exist. This issue can be addressed in two ways: - either by providing the right set of permissions on a section so that the linker assigns them to a segment with compatible permissions. - or by providing alignment constraints so that the linker can move the sections automatically to a new segment and set the right permission for non-executable data. The second option seems to be the preferred approach, even if not explicitly recommended. Examples of linker scripts for AArch64 are available at [1]. This patch reorganizes the linker script to eliminate RWX segments by changing the order of the sections and their offset. The tests needed to be amended to match the new addresses. [1]: https://developer.arm.com/documentation/dui0474/m/gnu-ld-script-support-in -armlink/default-gnu-ld-scripts-used-by-armlink/default-ld-script-when -building-an-executable?lang=en
2025-06-11AArch64 BTI/PAC PLT tests: remove RWX permissions on segmentsMatthieu Longo18-59/+86
The bti-far.ld and bti-plt.ld scripts don't provide information enough to the linker to assess the right set of permisssions on segments (i.e. Read/Write/Execute). This insufficiency caused the linker to bundle all the sections in a same segment with the union of all the required permissions, i.e. RWX. A segment with such lax permissions constitutes a security hole, so the linker emits the following warning message: <ELF file> has a LOAD segment with RWX permissions. This warning message is noisy in the tests, and has no reason to exist. This issue can be addressed in two ways: - either by providing the right set of permissions on a section so that the linker assigns them to a segment with compatible permissions. - or by providing alignment constraints so that the linker can move the sections automatically to a new segment and set the right permission for non-executable data. The second option seems to be the preferred approach, even if not explicitly recommended. Examples of linker scripts for AArch64 are available at [1]. The fixes in bti-far.ld and bti-plt.ld are the same, except that bti-far.ld also contains a ".far" section, to make sure that it generates the trampolines correctly. [1]: https://developer.arm.com/documentation/dui0474/m/gnu-ld-script-support-in -armlink/default-gnu-ld-scripts-used-by-armlink/default-ld-script-when -building-an-executable?lang=en
2025-06-11AArch64 tests: remove RWX permissions on segmentsMatthieu Longo6-56/+61
aarch64.ld is the linker script used by most of the relocation tests in AArch64 testsuite. The script does not provide information enough to the linker to assess the right set of permisssions on segments (i.e. Read/Write/Execute). This insufficiency caused the linker to bundle all the sections in a same segment with the union of all the required permissions, i.e. RWX. A segment with such lax permissions constitutes a security hole, so the linker emits the following warning message: <ELF file> has a LOAD segment with RWX permissions. This warning message is noisy in the tests, and has no reason to exist. This issue can be addressed in two ways: - either by providing the right set of permissions on a section so that the linker assigns them to a segment with compatible permissions. - or by providing alignment constraints so that the linker can move the sections automatically to a new segment and set the right permission for non-executable data. The second option seems to be the preferred approach, even if not explicitly recommended. Examples of linker scripts for AArch64 are available at [1]. [1]: https://developer.arm.com/documentation/dui0474/m/gnu-ld-script-support-in -armlink/default-gnu-ld-scripts-used-by-armlink/default-ld-script-when -building-an-executable?lang=en
2025-06-10AArch64, Arm and TIC6x tests: fix typo in linker scriptsMatthieu Longo11-12/+12
The linker scripts for AArch64 and TIC6x were probably originally copied from Arm testsuite, and contain the same typo in the name of the attributes section. This patch fixes the typo across all the testsuites.
2025-05-26LoongArch: overflow and underflow checks for R_LARCH_32_PCRELLulu Cai4-0/+16
Relocation overflows can silently write incorrect value to the file, so overflow checks are added to avoid this.
2025-05-19s390: Prevent GOT access rewrite for misaligned symbolsJens Remus6-0/+72
Dereferences of GOT slots with lgrl or lg for global symbols are rewritten to larl to get get rid of the extra memory access. However this is invalid for: - symbols marked for absolute addressing - symbols at odd addresses (larl can handle only even addresses) Commit e6213e09ed0e ("S/390: Prevent GOT access rewrite for certain symbols") added checks for the above. But instead of checking the address of a symbol for being halfword aligned, it tries to deduce this from whether the symbol value and section the symbol is defined in are halfword aligned. The way it is done has two issues: 1. The use of bfd_section_from_elf_index to obtain the section the symbol is defined in may not return the one that remains in the output. For instance for COMDAT sections getting deduplicated the section retrieved using bfd_section_from_elf_index may not be the same as h->root.u.def.section. If COMDAT sections of same group signature have different alignment properties the wrong one may be checked. This may then lead to an erroneous rewrite of lgrl %rX, sym@GOTENT to larl %rX, sym, although the symbol in the remaining section is not properly aligned, triggering an "relocation for misaligned symbol" error at link-time. This may for instance occur when mixing C++ modules compiled with GCC and Clang, as GCC emits a 2-byte alignment and Clang a 1-byte alignment for COMDAT sections containing type information: $ cat sample.cpp #include <typeinfo> struct A {}; const std::type_info &q() { return typeid(A); } $ g++ -c sample.cpp -o sample_gcc.o $ clang++ -c sample.cpp -o sample_clang.o $ readelf -WS sample_gcc.o sample_clang.o Produces (reformatted and reduced): File Name Off Size ES Flg Lk Inf Al sample_gcc.o .rodata._ZTS1A 000080 000004 00 AG 0 0 2 sample_clang.o .rodata._ZTS1A 000058 000003 00 AG 0 0 1 2. The symbol may end up at an even address, if both the symbol value and the section defining the symbol are 1-byte aligned. While this does not trigger an error, it fails an opportunity to rewrite a GOT access. In a Linux Kernel build this causes ~15k GOT accesses using lgrl to be skipped to be rewritten to larl. Resolve both issues by simply checking whether the symbol address is halfword aligned. Do not check the symbol value nor section defining the symbol for halfword alignment. bfd/ PR ld/32969 * elf64-s390.c (elf_s390_relocate_section): Only rewrite lgrl/lg from GOT to larl if symbol address is halfword aligned. ld/testsuite/ PR ld/32969 * ld-s390/s390.exp (pr32969_64-1, pr32969_64-2): Add tests for rewrite of GOT access when COMDAT section deduplication is involved. * ld-s390/pr32969_64-1.dd: New test for rewrite of GOT access when COMDAT section deduplication is involved. * ld-s390/pr32969_64-2.dd: Likewise. * ld-s390/pr32969a.s: Likewise. * ld-s390/pr32969b.s: Likewise. * ld-s390/pr32969c.s: Likewise. Bug: https://sourceware.org/PR32969 Fixes: e6213e09ed0e ("S/390: Prevent GOT access rewrite for certain symbols") Reported-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2025-05-16ld testsuite fail with --disable-pluginsAlan Modra1-6/+7
* testsuite/config/default.exp (dep_plug_opt): Don't set unless check_plugin_api_available returns true.
2025-05-15binutils: Don't complain plugin with all LTO sections removedH.J. Lu2-0/+22
When all LTO sections have been removed, the BFD lto_type is set to lto_non_ir_object by bfd_set_lto_type. In this case, don't complain needing a plugin when seeing a LTO slim symbol. bfd/ PR binutils/32967 * archive.c (_bfd_compute_and_write_armap): Call bfd_lto_slim_symbol_p to check LTO slim symbol. * bfd-in2.h: Generated. * bfd.c (bfd_lto_slim_symbol_p): New. binutils/ PR binutils/32967 * nm.c (filter_symbols): Call bfd_lto_slim_symbol_p to check LTO slim symbol. ld/ PR binutils/32967 * testsuite/ld-plugin/lto-binutils.exp: Run PR binutils/32967 tests. * testsuite/ld-plugin/strip-1a-s-all.nd: New file. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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